Searched full:trm (Results 1 – 25 of 30) sorted by relevance
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/Documentation/devicetree/bindings/pinctrl/ |
D | nvidia,tegra-pinmux-common.yaml | 39 or groups. See the Tegra TRM and various pinmux spreadsheets for complete 54 Tegra TRM to determine which are valid for each pin or group. 87 values depends on the pingroup. See "CAL_DRVDN" in the Tegra TRM. 92 values depends on the pingroup. See "CAL_DRVUP" in the Tegra TRM. 107 power. See "Low Power Mode" or "LPMD1" and "LPMD0" in the Tegra TRM. 169 valid values depends on the pingroup. See "DRVDN_SLWR" in the Tegra TRM. 174 valid values depends on the pingroup. See "DRVUP_SLWF" in the Tegra TRM.
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D | pinctrl_spear.txt | 46 group. See the SPEAr's TRM to determine which are valid for each pin or group.
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/Documentation/admin-guide/media/ |
D | omap3isp.rst | 74 OMAP 3430 TRM: 78 OMAP 35xx TRM: 81 OMAP 3630 TRM: 85 DM 3730 TRM:
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/Documentation/translations/zh_CN/video4linux/ |
D | omap3isp.txt | 221 大多数域的解释可以在 OMAP 的 TRM 中找到。以下两个域对于以上所有的 222 私有 IOCTL 配置都很常见,由于他们没有在 TRM 中提及,故需要对其有 257 OMAP 3430 TRM: 261 OMAP 35xx TRM: 264 OMAP 3630 TRM: 268 DM 3730 TRM:
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/Documentation/devicetree/bindings/clock/ |
D | nvidia,tegra124-dfll.txt | 40 - nvidia,droop-ctrl: See the register CL_DVFS_DROOP_CTRL in the TRM. 41 - nvidia,force-mode: See the field DFLL_PARAMS_FORCE_MODE in the TRM. 42 - nvidia,cf: Numeric value, see the field DFLL_PARAMS_CF_PARAM in the TRM. 43 - nvidia,ci: Numeric value, see the field DFLL_PARAMS_CI_PARAM in the TRM. 44 - nvidia,cg: Numeric value, see the field DFLL_PARAMS_CG_PARAM in the TRM. 47 - nvidia,cg-scale: Boolean value, see the field DFLL_PARAMS_CG_SCALE in the TRM.
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D | zynq-7000.txt | 7 See Chapter 25 of Zynq TRM for more information about Zynq clocks.
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/Documentation/admin-guide/perf/ |
D | arm-cmn.rst | 25 Most events are specified in a format based directly on the TRM 45 (as defined in the "Node ID Mapping" section of the TRM). 59 "wp_exclusive" are specified per the TRM definitions for dtm_wp_config0.
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D | arm_dsu_pmu.rst | 21 The user should refer to the TRM of the product to figure out the supported events
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/Documentation/devicetree/bindings/memory-controllers/ |
D | arm,pl35x-smc.yaml | 17 The TRM is available here: 119 # According to TRM, really should be 3 clocks
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D | nvidia,tegra124-mc.yaml | 69 "15.6.1 MC Registers" in the TRM.
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D | nvidia,tegra30-mc.yaml | 86 "18.13.1 MC Registers" in the TRM.
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D | nvidia,tegra20-emc.yaml | 85 (see section "15.4.1 EMC Registers" in the TRM) whose values
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/Documentation/devicetree/bindings/dma/ |
D | nvidia,tegra20-apbdma.txt | 16 select value for the peripheral. For more details, consult the Tegra TRM's
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/Documentation/devicetree/bindings/mfd/ |
D | twl4030-audio.txt | 19 -ti,offset_cncl_path: Offset cancellation path selection, refer to TRM for the
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/Documentation/hwmon/ |
D | vexpress.rst | 17 * Section "4.4.14. System Configuration registers" of the V2M-P1 TRM:
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/Documentation/devicetree/bindings/reset/ |
D | zynq-reset.txt | 5 See Chapter 26 of the Zynq TRM (UG585) for more information about Zynq resets.
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/Documentation/devicetree/bindings/perf/ |
D | arm,cmn.yaml | 39 discovery node (see TRM definition of ROOTNODEBASE). Not
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/Documentation/devicetree/bindings/devfreq/ |
D | nvidia,tegra30-actmon.yaml | 58 entry. Consult TRM documentation for information about available
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/Documentation/devicetree/bindings/mmc/ |
D | sdhci-am654.yaml | 173 ti,trm-icp: 240 ti,trm-icp = <0x8>;
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/Documentation/ABI/testing/ |
D | sysfs-bus-coresight-devices-etb10 | 20 value stored in this register+1 (from ARM ETB-TRM).
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/Documentation/devicetree/bindings/display/ |
D | arm,malidp.yaml | 79 See the ARM Mali-DP500 TRM for details on the encoding.
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/Documentation/devicetree/bindings/display/ti/ |
D | ti,am65x-dss.yaml | 30 Addresses to each DSS memory region described in the SoC's TRM.
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/Documentation/devicetree/bindings/bus/ |
D | nvidia,tegra20-gmi.txt | 53 From Tegra TRM:
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/Documentation/devicetree/bindings/arm/ |
D | vexpress-config.yaml | 16 function and device numbers - see motherboard's TRM for more details.
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/Documentation/userspace-api/media/drivers/ |
D | omap3isp-uapi.rst | 168 are not part of the TRM.
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