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/Documentation/devicetree/bindings/clock/
Dsamsung,exynos7885-clock.yaml23 CMU_TOP is a top-level CMU, where all base clocks are prepared using PLLs and
24 dividers; all other leaf clocks (other CMUs) are usually derived from CMU_TOP.
81 - description: CMU_CORE bus clock (from CMU_TOP)
82 - description: CCI clock (from CMU_TOP)
83 - description: G3D clock (from CMU_TOP)
103 - description: CMU_FSYS bus clock (from CMU_TOP)
104 - description: MMC_CARD clock (from CMU_TOP)
105 - description: MMC_EMBD clock (from CMU_TOP)
106 - description: MMC_SDIO clock (from CMU_TOP)
107 - description: USB30DRD clock (from CMU_TOP)
[all …]
Dsamsung,exynos850-clock.yaml23 CMU_TOP is a top-level CMU, where all base clocks are prepared using PLLs and
24 dividers; all other leaf clocks (other CMUs) are usually derived from CMU_TOP.
88 - description: CMU_APM bus clock (from CMU_TOP)
106 - description: AUD clock (from CMU_TOP)
142 - description: CMU_CORE bus clock (from CMU_TOP)
143 - description: CCI clock (from CMU_TOP)
144 - description: eMMC clock (from CMU_TOP)
145 - description: SSS clock (from CMU_TOP)
166 - description: DPU clock (from CMU_TOP)
184 - description: G3D clock (from CMU_TOP)
[all …]
Dsamsung,exynosautov9-clock.yaml23 CMU_TOP is a top-level CMU, where all base clocks are prepared using PLLs and
25 derived from CMU_TOP.
87 - description: CMU_BUSMC bus clock (from CMU_TOP)
105 - description: CMU_CORE bus clock (from CMU_TOP)
123 - description: CMU_FSYS0 bus clock (from CMU_TOP)
124 - description: CMU_FSYS0 pcie clock (from CMU_TOP)
143 - description: CMU_FSYS1 bus clock (from CMU_TOP)
144 - description: CMU_FSYS1 mmc card clock (from CMU_TOP)
145 - description: CMU_FSYS1 usb clock (from CMU_TOP)
165 - description: CMU_FSYS2 bus clock (from CMU_TOP)
[all …]
Dsamsung,exynos5433-clock.yaml26 # CMU_TOP which generates clocks for