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/Documentation/devicetree/bindings/powerpc/
Dsleep.yaml19 The sleep property consists of one or more sleep resources, each of
20 which consists of a phandle to a sleep controller, followed by a
/Documentation/devicetree/bindings/media/i2c/
Dpanasonic,amg88xx.txt4 8x8 10Hz video which consists of thermal datapoints
/Documentation/devicetree/bindings/clock/
Dimx7ulp-scg-clock.yaml23 M4 clock management consists of SCG0, PCC0, PCC1, and CMC0 modules.
24 A7 clock management consists of SCG1, PCC2, PCC3, and CMC1 modules.
Dimx7ulp-pcc-clock.yaml23 M4 clock management consists of SCG0, PCC0, PCC1, and CMC0 modules.
24 A7 clock management consists of SCG1, PCC2, PCC3, and CMC1 modules.
Dmicrochip,pic32.txt3 Microchip clock controller is consists of few oscillators, PLL, multiplexer
Dhisi-crg.txt32 The reset specifier consists of two cells. The first cell represents the
/Documentation/devicetree/bindings/mfd/
Dqriox.txt5 It is consists of a reset controller, watchdog timer, LEDs, and 2 IRQ capable
Dlp3943.txt7 LP3943 consists of two sub-devices, lp3943-gpio and lp3943-pwm.
Dda9062.txt7 The DA9062 PMIC consists of:
18 The DA9061 PMIC consists of:
Dzii,rave-sp.txt18 RAVE SP consists of the following sub-devices:
/Documentation/devicetree/bindings/powerpc/fsl/
Dsrio-rmu.txt60 value of the interrupts property consists of one interrupt
90 value of the interrupts property consists of one interrupt
120 value of the interrupts property consists of one interrupt
/Documentation/admin-guide/media/
Dintro.rst7 The media subsystem consists on Linux support for several different types
/Documentation/admin-guide/device-mapper/
Dswitch.rst20 consists of a number of distinct storage arrays ("members") each having
54 The lower tier consists of a single dm multipath device for each member.
61 The upper tier consists of a single dm-switch device. This device uses
/Documentation/leds/
Dleds-qcom-lpg.rst10 The Qualcomm LPG can be found in a variety of Qualcomm PMICs and consists of a
23 deeper idle states the LPG provides pattern support. This consists of a shared
/Documentation/userspace-api/media/v4l/
Dpixfmt-v4l2-mplane.rst28 set by the driver. When the image consists of variable length
87 format consists of. The number of valid entries in this array has
Dcommon.rst8 Programming a V4L2 device consists of these steps:
/Documentation/devicetree/bindings/iio/adc/
Dti,twl4030-madc.yaml13 The MADC subsystem in the TWL4030 consists of a 10-bit ADC
/Documentation/i2c/
Dslave-testunit-backend.rst24 an 8-bit version number of the testunit. When writing, the device consists of 4
83 data consists of the length first, and then of an array of bytes from length-1
/Documentation/devicetree/bindings/mailbox/
Dst,sti-mailbox.yaml10 Each ST Mailbox IP currently consists of 4 instances of 32 channels.
/Documentation/devicetree/bindings/pinctrl/
Dfsl,imx6sx-pinctrl.txt8 - fsl,pins: each entry consists of 6 integers and represents the mux and config
Dfsl,imx6ul-pinctrl.txt9 - fsl,pins: each entry consists of 6 integers and represents the mux and config
Dfsl,imx6sll-pinctrl.txt8 - fsl,pins: each entry consists of 6 integers and represents the mux and config
Dfsl,imx7ulp-pinctrl.txt15 - fsl,pins: Each entry consists of 5 integers which represents the mux
/Documentation/devicetree/bindings/dma/
Dsocionext,uniphier-xdmac.yaml33 DMA request from clients consists of 2 cells:
/Documentation/devicetree/bindings/gpio/
Dairoha,en7523-gpio.yaml13 Airoha's GPIO controller on their ARM EN7523 SoCs consists of two banks of 32

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