Searched full:cpu3 (Results 1 – 23 of 23) sorted by relevance
| /Documentation/translations/zh_CN/scheduler/ |
| D | sched-energy.rst | 152 CPU0 CPU1 CPU2 CPU3
170 512 - - - - - - - ##- - - - - * CPU3: 500 / 768 * 800 = 520
177 CPU0 CPU1 CPU2 CPU3
188 512 - - - - - - - ##- - -PP - * CPU3: 700 / 768 * 800 = 729
195 CPU0 CPU1 CPU2 CPU3
205 512 =========== - ##- - - - - * CPU3: 500 / 768 * 800 = 520
212 CPU0 CPU1 CPU2 CPU3
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| /Documentation/translations/zh_CN/core-api/irq/ |
| D | irq-affinity.rst | 46 CPU0 CPU1 CPU2 CPU3 CPU4 CPU5 CPU6 CPU7
64 CPU0 CPU1 CPU2 CPU3 CPU4 CPU5 CPU6 CPU7
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| /Documentation/scheduler/ |
| D | sched-energy.rst | 152 composed of two CPUs each. CPU0 and CPU1 are little CPUs; CPU2 and CPU3
179 CPU0 CPU1 CPU2 CPU3
186 CPU1 and CPU3. Then it will estimate the energy of the system if P was
200 512 - - - - - - - ##- - - - - * CPU3: 500 / 768 * 800 = 520
207 CPU0 CPU1 CPU2 CPU3
210 **Case 2. P is migrated to CPU3**::
218 512 - - - - - - - ##- - -PP - * CPU3: 700 / 768 * 800 = 729
225 CPU0 CPU1 CPU2 CPU3
236 512 =========== - ##- - - - - * CPU3: 500 / 768 * 800 = 520
243 CPU0 CPU1 CPU2 CPU3
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| /Documentation/core-api/irq/ |
| D | irq-affinity.rst | 38 CPU0 CPU1 CPU2 CPU3 CPU4 CPU5 CPU6 CPU7
57 CPU0 CPU1 CPU2 CPU3 CPU4 CPU5 CPU6 CPU7
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| /Documentation/devicetree/bindings/cpu/ |
| D | cpu-topology.txt | 208 cpu = <&CPU3>;
300 CPU3: cpu@101 {
423 cpu = <&CPU3>;
461 CPU3: cpu@3 {
517 cpu0 = <&CPU3>;
534 CPU3: cpu@3 {
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| D | cpu-capacity.txt | 225 cpu3: cpu@3 {
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| /Documentation/devicetree/bindings/arm/ |
| D | arm,cci-400.yaml | 138 * {CPU2, CPU3};
166 CPU3: cpu@101 {
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| /Documentation/devicetree/bindings/cpufreq/ |
| D | cpufreq-mediatek.txt | 222 cpu3: cpu@101 {
247 &cpu3 {
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| D | qcom-cpufreq-nvmem.yaml | 156 CPU3: cpu@103 {
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| D | cpufreq-qcom-hw.yaml | 268 CPU3: cpu@300 {
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| /Documentation/powerpc/ |
| D | vcpudispatch_stats.rst | 53 cpu3 2259 1165 1088 6 0 2256 3 0
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| /Documentation/devicetree/bindings/opp/ |
| D | opp-v2-kryo-cpu.yaml | 158 CPU3: cpu@101 {
190 cpu = <&CPU3>;
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| /Documentation/devicetree/bindings/thermal/ |
| D | thermal-zones.yaml | 296 <&CPU2 3 3>, <&CPU3 3 3>;
303 <&CPU2 5 5>, <&CPU3 5 5>;
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| /Documentation/devicetree/bindings/net/ |
| D | marvell,pp2.yaml | 93 "tx-cpu1", "tx-cpu2", "tx-cpu3" and "rx-shared" are supported
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| /Documentation/devicetree/bindings/interrupt-controller/ |
| D | arm,gic-v3.yaml | 305 affinity = <&cpu1>, <&cpu3>;
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| /Documentation/trace/coresight/ |
| D | coresight-config.rst | 218 cpu1 cpu3 format perf_event_mux_interval_ms sinks type
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| /Documentation/translations/zh_CN/core-api/ |
| D | cpu_hotplug.rst | 106 drwxr-xr-x 9 root root 0 Dec 21 16:33 cpu3
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| /Documentation/devicetree/bindings/sound/ |
| D | simple-card.yaml | 486 # CPU3 --/ /* DPCM 5ch/6ch */
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| /Documentation/core-api/ |
| D | cpu_hotplug.rst | 105 drwxr-xr-x 9 root root 0 Dec 21 16:33 cpu3
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| /Documentation/translations/ko_KR/ |
| D | memory-barriers.txt | 1453 void cpu3(void)
1471 적용되므로 cpu3() 에, 적어도 스토어들 외에는 적용되지 않습니다. 따라서, 다음과
1484 로드들에 앞세울 필요는 없다는 사실에서 기인합니다. 이 말은 cpu3() 는 cpu0() 의
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| /Documentation/ |
| D | memory-barriers.txt | 1460 void cpu3(void)
1480 to the CPUs participating in that chain and does not apply to cpu3(),
1494 subsequent loads in all cases. This means that cpu3() can see cpu0()'s
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| /Documentation/translations/sp_SP/ |
| D | memory-barriers.txt | 1527 void cpu3(void)
1548 se aplica a cpu3(), al menos aparte de los stores. Por lo tanto, es posible
1563 Esto significa que cpu3() puede ver el store de cpu0() suceder -después- de
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| /Documentation/filesystems/ |
| D | proc.rst | 1246 CPU0 CPU1 CPU2 CPU3
1472 cpu3 58622065 92190267 26529524 468436680 155879 0 2114478 0 0 0
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