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/Documentation/devicetree/bindings/remoteproc/
Dqcom,q6v5.txt9 Definition: must be one of:
16 Definition: must specify the base address and size of the qdsp6 and
22 Definition: must be "q6dsp" and "rmb"
27 Definition: reference to the interrupts that match interrupt-names
32 Definition: must be "wdog", "fatal", "ready", "handover", "stop-ack"
37 Definition: reference to the clocks that match clock-names
42 Definition: The clocks needed depend on the compatible string:
54 Definition: reference to the list of 3 reset-controllers for the
60 Definition: must be "wcss_aon_reset", "wcss_reset", "wcss_q6_reset"
66 Definition: reference to wcss reserved-memory region.
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/Documentation/devicetree/bindings/phy/
Dqcom,usb-8x16-phy.txt6 Definition: Should contain "qcom,usb-8x16-phy".
11 Definition: USB PHY base address and length of the register map
16 Definition: See clock-bindings.txt section "consumers". List of
23 Definition: Must contain "iface" and "core" strings.
28 Definition: phandle to the regulator VDCCX supply node.
33 Definition: phandle to the regulator 1.8V supply node.
38 Definition: phandle to the regulator 3.3V supply node.
43 Definition: See reset.txt section "consumers". PHY reset specifier.
48 Definition: Must contain "phy" string.
53 Definition: Some boards are using Dual SPDT USB Switch, witch is
/Documentation/devicetree/bindings/input/
Dqcom,pm8xxx-keypad.txt8 Definition: must be one of:
15 Definition: address of keypad control register
20 Definition: the first interrupt specifies the key sense interrupt
28 Definition: the linux keymap. More information can be found in
34 Definition: don't enable autorepeat feature.
39 Definition: use any event on keypad as wakeup event.
45 Definition: number of rows in the keymap. More information can be found
51 Definition: number of columns in the keymap. More information can be
57 Definition: time in microseconds that key must be pressed or release
63 Definition: time in microseconds to pause between successive scans
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/Documentation/devicetree/bindings/pinctrl/
Dqcom,apq8084-pinctrl.txt9 Definition: must be "qcom,apq8084-pinctrl"
14 Definition: the base address and size of the TLMM register space.
19 Definition: should specify the TLMM summary IRQ.
24 Definition: identifies this node as an interrupt controller
29 Definition: must be 2. Specifying the pin number and flags, as defined
35 Definition: identifies this node as a gpio controller
40 Definition: must be 2. Specifying the pin number and flags, as defined
45 Definition: see ../gpio/gpio.txt
49 Definition: see ../gpio/gpio.txt
83 Definition: List of gpio pins affected by the properties specified in
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/Documentation/devicetree/bindings/sound/
Dqcom,apq8096.txt8 Definition: must be "qcom,apq8096-sndcard"
13 Definition: A list of the connections between audio components.
56 Definition: The user-visible name of this sound card.
61 Definition: A list of phandles for auxiliary devices (e.g. analog
73 Definition: User friendly name for dai link
79 Definition: cpu dai sub-node
84 Definition: codec dai sub-node
89 Definition: platform dai sub-node
94 Definition: dai phandle/s and port of CPU/CODEC/PLATFORM node.
/Documentation/devicetree/bindings/soc/fsl/cpm_qe/
Dnetwork.txt55 Definition : Must be "brg1"-"brg16" for internal clock source,
61 Definition : Specify that hdlc is based on tdm-interface
67 Definition : Must be "none", "rsync_pin", "brg9-11" and "brg13-15".
72 Definition : Must be "none", "tsync_pin", "brg9-11" and "brg13-15".
77 Definition : "e1" or "t1".Now e1 and t1 are used, other framer types
83 Definition : number of TDM ID
89 Definition : time slot mask for TDM operation. Indicates which time
95 Definition : Must be 0,2,4...64. the number of TDM entry.
100 Definition : Internal loopback connecting on TDM layer.
104 Definition: HDLC address recognition. Set to zero to disable
/Documentation/devicetree/bindings/powerpc/fsl/
Dsrio-rmu.txt13 Definition: Must include "fsl,srio-rmu-vX.Y", "fsl,srio-rmu".
21 Definition: A standard property. Specifies the physical address and
28 Definition: The logical I/O device number for the PAMU (IOMMU) to be
44 Definition: Must include "fsl,srio-msg-unit-vX.Y", "fsl,srio-msg-unit".
52 Definition: A standard property. Specifies the physical address and
59 Definition: Specifies the interrupts generated by this device. The
73 Definition: Must include:
82 Definition: A standard property. Specifies the physical address and
89 Definition: Specifies the interrupts generated by this device. The
103 Definition: Must include:
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Ddcsr.txt24 Definition: Must include "fsl,dcsr" and "simple-bus".
30 Definition: A standard property. Defines the number of cells
36 Definition: A standard property. Defines the number of cells
43 Definition: A standard property. Specifies the physical address
64 Definition: Must include "fsl,dcsr-epu"
69 Definition: Specifies the interrupts generated by the EPU.
90 Definition: A standard property. Specifies the physical address
114 Definition: Must include "fsl,dcsr-npc"
119 Definition: A standard property. Specifies the physical address
151 Definition: Must include "fsl,dcsr-nxc"
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Dsrio.txt8 Definition: Must include "fsl,srio" for IP blocks with IP Block
18 Definition: A standard property. Specifies the physical address and
25 Definition: Specifies the interrupts generated by this device. The
36 Definition: A single <phandle> value that points to the RMU.
46 Definition: A standard property. Matches the port id.
51 Definition: A standard property. Utilized to describe the memory mapped
59 Definition: The logical I/O device number for the PAMU (IOMMU) to be
Decm.txt18 Definition: Must include "fsl,ecm-law"
23 Definition: A standard property. The value specifies the
30 Definition: The value specifies the number of local access
46 Definition: Must include "fsl,CHIP-ecm", "fsl,ecm" where
52 Definition: A standard property. The value specifies the
Dmcm.txt18 Definition: Must include "fsl,mcm-law"
23 Definition: A standard property. The value specifies the
30 Definition: The value specifies the number of local access
46 Definition: Must include "fsl,CHIP-mcm", "fsl,mcm" where
52 Definition: A standard property. The value specifies the
Dmpic.txt17 Definition: Shall include "fsl,mpic". Freescale MPIC
25 Definition: A standard property. Specifies the physical
32 Definition: Specifies that this node is an interrupt
38 Definition: Shall be 2 or 4. A value of 2 means that interrupt
45 Definition: Shall be 0.
50 Definition: The presence of this property specifies that the
80 INTERRUPT SPECIFIER DEFINITION
192 * Definition of a node defining the 4
207 * Definition of a node defining the MPIC
222 * Definition of an error interrupt (interrupt type 1).
/Documentation/devicetree/bindings/soc/fsl/
Dqman-portals.txt21 Definition: Must include "fsl,qman-portal-<hardware revision>"
27 Definition: Two regions. The first is the cache-enabled region of
34 Definition: Standard property
39 Definition: Two LIODN(s). DQRR LIODN (DLIODN) and Frame LIODN
45 Definition: PAMU property used for dynamic LIODN assignment
52 Definition: The hardware index of the channel. This can also be
71 Definition: PAMU property used for static LIODN assignment
76 Definition: PAMU property used for dynamic LIODN assignment
81 Definition: The phandle to the particular hardware device that this
Dqman.txt25 Definition: Must include "fsl,qman"
31 Definition: Registers region within the CCSR address space
39 Definition: Standard property. The error interrupt
44 Definition: Phandle to this QMan instance's portals
49 Definition: PAMU property used for static LIODN assignment
54 Definition: PAMU property used for dynamic LIODN assignment
61 Definition: Reference input clock. Its frequency is half of the
66 Definition: List of phandles referencing the QMan private memory
94 Definition: PPC platforms: Must include "fsl,qman-fqd"
105 Definition: PPC platforms: Must include "fsl,qman-pfdr"
Dbman.txt23 Definition: Must include "fsl,bman"
29 Definition: Registers region within the CCSR address space
37 Definition: Standard property. The error interrupt
42 Definition: Phandle to this BMan instance's portals
47 Definition: PAMU property used for static LIODN assignment
52 Definition: PAMU property used for dynamic LIODN assignment
78 Definition: PPC platforms: Must include "fsl,bman-fbpr"
/Documentation/devicetree/bindings/csky/
Dcpus.txt13 cpus and cpu node bindings definition
27 Definition: must be set to 1
31 Definition: must be set to 0
42 Definition: must be "cpu"
46 Definition: CPU index
50 Definition: must contain "csky", eg:
Dpmu.txt9 PMU node bindings definition
19 Definition: must be "csky,csky-pmu"
23 Definition: must be pmu irq num defined by soc
27 Definition: the width of pmu counter
/Documentation/devicetree/bindings/timer/
Dcsky,gx6605s-timer.txt9 timer node bindings definition
19 Definition: must be "csky,gx6605s-timer"
23 Definition: <phyaddr size> in soc from cpu view
27 Definition: must be input clk node
31 Definition: must be timer irq num defined by soc
Dcsky,mptimer.txt14 timer node bindings definition
24 Definition: must be "csky,mptimer"
28 Definition: must be input clk node
32 Definition: must be timer irq num defined by soc
/Documentation/devicetree/bindings/clock/
Dqcom,krait-cc.txt8 Definition: must be one of:
15 Definition: must be 1
20 Definition: reference to the clock parents of hfpll, secondary muxes.
25 Definition: must be "hfpll0", "hfpll1", "acpu0_aux", "acpu1_aux", "qsb".
Dqcom,hfpll.txt19 Definition: address and size of HPLL registers. An optional second
26 Definition: reference to the xo clock.
31 Definition: must be "xo".
36 Definition: Name of the PLL. Typically hfpllX where X is a CPU number
/Documentation/devicetree/bindings/misc/
Dfsl,qoriq-mc.txt45 Definition: Must be "fsl,qoriq-mc". A Freescale Management Complex
52 Definition: A standard property. Specifies one or two regions
64 Definition: A standard property. Defines the mapping between the child
76 Definition: Must be 3. (see definition in 'ranges' property)
80 Definition: Must be 1.
93 Definition: Must be present if dpmac sub-nodes are defined and must
98 Definition: Must be present if dpmac sub-nodes are defined and must
105 Definition: Must be "fsl,qoriq-mc-dpmac".
109 Definition: Specifies the id of the dpmac.
113 Definition: Specifies the phandle to the PHY device node associated
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/Documentation/devicetree/bindings/crypto/
Dfsl-sec6.txt23 Definition: Must include "fsl,sec-v6.0".
28 Definition: A standard property. Define the 'ERA' of the SEC
34 Definition: A standard property. Defines the number of cells
40 Definition: A standard property. Defines the number of cells
47 Definition: A standard property. Specifies the physical
53 Definition: A standard property. Specifies the physical address
84 Definition: Must include "fsl,sec-v6.0-job-ring".
89 Definition: Specifies a two JR parameters: an offset from
95 Definition: Specifies the interrupts generated by this
/Documentation/devicetree/bindings/net/
Dfsl-fman.txt26 Definition: Must include "fsl,fman"
35 Definition: Specifies the index of the FMan unit.
67 Definition: A standard property. Specifies the offset of the
78 Definition: A standard property.
83 Definition: phandle for the fman input clock.
88 Definition: "fmanclk" for the fman input clock.
93 Definition: A pair of IRQs are specified in this property.
100 Definition: Specifies the range of the available dedicated
111 Definition: See soc/fsl/qman.txt and soc/fsl/bman.txt
116 Definition: A boolean property. Indicates the presence of the
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/Documentation/devicetree/bindings/powerpc/
Dibm,powerpc-cpu-features.txt38 Definition: "ibm,powerpc-cpu-features"
48 Definition:
62 Definition:
86 Definition:
97 Definition:
113 Definition:
132 Definition:
151 Definition: HFSCR bit position (LSB0)
164 Definition: FSCR bit position (LSB0)
177 Definition: Linux ELF AUX vector bit position (LSB0)
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