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/Documentation/devicetree/bindings/display/connector/
Ddp-connector.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/connector/dp-connector.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Tomi Valkeinen <tomi.valkeinen@ti.com>
14 const: dp-connector
20 - full-size
21 - mini
23 hpd-gpios:
27 dp-pwr-supply:
[all …]
/Documentation/devicetree/bindings/iio/afe/
Dvoltage-divider.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/afe/voltage-divider.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Peter Rosin <peda@axentia.se>
13 When an io-channel measures the midpoint of a voltage divider, the
14 interesting voltage is often the voltage over the full resistance
18 Vin ----.
20 .-----.
22 '-----'
[all …]
/Documentation/devicetree/bindings/dma/
Dst,stm32-dma.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/dma/st,stm32-dma.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 The STM32 DMA is a general-purpose direct memory access controller capable of
13 described in the dma.txt file, using a four-cell specifier for each
19 -bit 9: Peripheral Increment Address
22 -bit 10: Memory Increment Address
25 -bit 15: Peripheral Increment Offset Size
26 0x0: offset size is linked to the peripheral bus width
[all …]
/Documentation/ABI/testing/
Dsysfs-driver-ufs3 Contact: linux-scsi@vger.kernel.org
5 This file contains the auto-hibernate idle timer setting of a
6 UFS host controller. A value of '0' means auto-hibernate is not
11 10-bit values with a power-of-ten multiplier which allows a
20 device descriptor parameters. The full information about
30 device descriptor parameters. The full information about
40 the UFS device descriptor parameters. The full information
51 The full information about the descriptor could be found
61 the UFS device descriptor parameters. The full information
72 The full information about the descriptor could be found
[all …]
/Documentation/devicetree/bindings/power/supply/
Dbq27xxx.yaml1 # SPDX-License-Identifier: GPL-2.0
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Pali Rohár <pali@kernel.org>
12 - Andrew F. Davis <afd@ti.com>
13 - Sebastian Reichel <sre@kernel.org>
20 - $ref: power-supply.yaml#
25 - ti,bq27200
26 - ti,bq27210
27 - ti,bq27500 # deprecated, use revision specific property below
[all …]
/Documentation/devicetree/bindings/net/dsa/
Dmicrochip,lan937x.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - UNGLinuxDriver@microchip.com
13 - $ref: dsa.yaml#/$defs/ethernet-ports
18 - microchip,lan9370
19 - microchip,lan9371
20 - microchip,lan9372
21 - microchip,lan9373
22 - microchip,lan9374
[all …]
Dmicrochip,ksz.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Marek Vasut <marex@denx.de>
11 - Woojung Huh <Woojung.Huh@microchip.com>
14 - $ref: dsa.yaml#/$defs/ethernet-ports
15 - $ref: /schemas/spi/spi-peripheral-props.yaml#
22 - microchip,ksz8765
23 - microchip,ksz8794
24 - microchip,ksz8795
[all …]
Dmscc,ocelot.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Vladimir Oltean <vladimir.oltean@nxp.com>
11 - Claudiu Manoil <claudiu.manoil@nxp.com>
12 - Alexandre Belloni <alexandre.belloni@bootlin.com>
13 - UNGLinuxDriver@microchip.com
16 There are multiple switches which are either part of the Ocelot-1 family, or
22 Frame DMA or register-based I/O.
26 This is found in the NXP T1040, where it is a memory-mapped platform
[all …]
Dmediatek,mt7530.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Arınç ÜNAL <arinc.unal@arinc9.com>
11 - Landen Chao <Landen.Chao@mediatek.com>
12 - DENG Qingfang <dqfext@gmail.com>
13 - Sean Wang <sean.wang@mediatek.com>
14 - Daniel Golle <daniel@makrotopia.org>
17 There are three versions of MT7530, standalone, in a multi-chip module and
18 built-into a SoC.
[all …]
Dvitesse,vsc73xx.txt9 Vitesse VSC7385 SparX-G5 5+1-port Integrated Gigabit Ethernet Switch
10 Vitesse VSC7388 SparX-G8 8-port Integrated Gigabit Ethernet Switch
11 Vitesse VSC7395 SparX-G5e 5+1-port Integrated Gigabit Ethernet Switch
12 Vitesse VSC7398 SparX-G8e 8-port Integrated Gigabit Ethernet Switch
17 reside inside a SPI bus device tree node, see spi/spi-bus.txt
19 When the chip is connected to a parallel memory bus and work in memory-mapped
25 - compatible: must be exactly one of:
30 - gpio-controller: indicates that this switch is also a GPIO controller,
32 - #gpio-cells: this must be set to <2> and indicates that we are a twocell
37 - reset-gpios: a handle to a GPIO line that can issue reset of the chip.
[all …]
Dbrcm,b53.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Florian Fainelli <f.fainelli@gmail.com>
18 - const: brcm,bcm5325
19 - const: brcm,bcm53115
20 - const: brcm,bcm53125
21 - const: brcm,bcm53128
22 - const: brcm,bcm53134
23 - const: brcm,bcm5365
[all …]
Dar9331.txt1 Atheros AR9331 built-in switch
4 It is a switch built-in to Atheros AR9331 WiSoC and addressable over internal
5 MDIO bus. All PHYs are built-in as well.
9 - compatible: should be: "qca,ar9331-switch"
10 - reg: Address on the MII bus for the switch.
11 - resets : Must contain an entry for each entry in reset-names.
12 - reset-names : Must include the following entries: "switch"
13 - interrupt-parent: Phandle to the parent interrupt controller
14 - interrupts: IRQ line for the switch
15 - interrupt-controller: Indicates the switch is itself an interrupt
[all …]
/Documentation/devicetree/bindings/iio/dac/
Dadi,ltc2688.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Nuno Sá <nuno.sa@analog.com>
13 Analog Devices LTC2688 16 channel, 16 bit, +-15V DAC
14 https://www.analog.com/media/en/technical-documentation/data-sheets/ltc2688.pdf
19 - adi,ltc2688
24 vcc-supply:
27 iovcc-supply:
30 vref-supply:
[all …]
/Documentation/arch/x86/
Dtlb.rst1 .. SPDX-License-Identifier: GPL-2.0
10 1. Flush the entire TLB with a two-instruction sequence. This is
21 1. The size of the flush being performed. A flush of the entire
28 3. The size of the TLB. The larger the TLB, the more collateral
29 damage we do with a full flush. So, the larger the TLB, the
32 4. The microarchitecture. The TLB has become a multi-level
34 expensive relative to single-page flushes.
54 guaranteed to flush a full 2MB [1]_, hugetlbfs always uses the full
67 perf stat -e
75 That works on an IvyBridge-era CPU (i5-3320M). Different CPUs
[all …]
/Documentation/devicetree/bindings/fpga/
Dfpga-region.txt6 - Introduction
7 - Terminology
8 - Sequence
9 - FPGA Region
10 - Supported Use Models
11 - Device Tree Examples
12 - Constraints
31 Full Reconfiguration
44 * The size and specific location of each PRR is fixed.
62 * During Full Reconfiguration, hardware bridges between the host and FPGA
[all …]
/Documentation/driver-api/md/
Draid5-cache.rst7 caches data to the RAID disks. The cache can be in write-through (supported
8 since 4.4) or write-back mode (supported since 4.10). mdadm (supported since
9 3.4) has a new option '--write-journal' to create array with cache. Please
11 in write-through mode. A user can switch it to write-back mode by::
13 echo "write-back" > /sys/block/md0/md/journal_mode
15 And switch it back to write-through mode by::
17 echo "write-through" > /sys/block/md0/md/journal_mode
22 write-through mode
34 The write-through cache will cache all data on cache disk first. After the data
36 two-step write will guarantee MD can recover correct data after unclean
[all …]
/Documentation/accounting/
Dpsi.rst4 PSI - Pressure Stall Information
14 either play it safe and under-utilize their hardware resources, or
23 scarcity aids users in sizing workloads to hardware--or provisioning
38 respective file in /proc/pressure/ -- cpu, memory, and io.
43 full avg10=0.00 avg60=0.00 avg300=0.00 total=0
48 The "full" line indicates the share of time in which all non-idle
55 stall state is tracked separately and exported in the "full" averages.
57 CPU full is undefined at the system level, but has been reported
83 <some|full> <stall amount in us> <time window in us>
87 1sec time window. Writing "full 50000 1000000" into /proc/pressure/io
[all …]
/Documentation/devicetree/bindings/mfd/
Dene-kb930.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/mfd/ene-kb930.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
14 - Dmitry Osipenko <digetx@gmail.com>
16 $ref: /schemas/power/supply/power-supply.yaml
21 - enum:
22 - acer,a500-iconia-ec # Acer A500 Iconia tablet device
23 - const: ene,kb930
27 system-power-controller: true
[all …]
/Documentation/networking/device_drivers/ethernet/3com/
Dvortex.rst1 .. SPDX-License-Identifier: GPL-2.0
20 - Andrew Morton
21 - Netdev mailing list <netdev@vger.kernel.org>
22 - Linux kernel mailing list <linux-kernel@vger.kernel.org>
28 Since kernel 2.3.99-pre6, this driver incorporates the support for the
29 3c575-series Cardbus cards which used to be handled by 3c575_cb.c.
33 - 3c590 Vortex 10Mbps
34 - 3c592 EISA 10Mbps Demon/Vortex
35 - 3c597 EISA Fast Demon/Vortex
36 - 3c595 Vortex 100baseTx
[all …]
/Documentation/networking/device_drivers/ethernet/toshiba/
Dspider_net.rst1 .. SPDX-License-Identifier: GPL-2.0
26 containing the received data, the buffer size, and various status bits.
29 "full" and "not-in-use". An "empty" or "ready" descriptor is ready
30 to receive data from the hardware. A "full" descriptor has data in it,
31 and is waiting to be emptied and processed by the OS. A "not-in-use"
32 descriptor is neither empty or full; it is simply not ready. It may
39 buffers, and marks them "full". The OS follows up, taking the full
40 buffers, processing them, and re-marking them empty.
46 marks it full, and advances the GDACTDPA by one. Thus, when there is
47 flowing RX traffic, every descr behind it should be marked "full",
[all …]
/Documentation/filesystems/ext4/
Dchecksums.rst1 .. SPDX-License-Identifier: GPL-2.0
4 ---------
10 structures did not have space to fit a full 32-bit checksum, so only the
12 structure size so that full 32-bit checksums can be stored for many data
13 structures. However, existing 32-bit filesystems cannot be extended to
18 ``tune2fs -O metadata_csum`` against the underlying device. If tune2fs
20 checksum, it will request that you run ``e2fsck -D`` to have the
30 .. list-table::
32 :header-rows: 1
34 * - Metadata
[all …]
/Documentation/admin-guide/device-mapper/
Ddm-ebs.rst2 dm-ebs
7 a smaller logical block size on a device with a larger logical block
8 size. Its main purpose is to provide emulation of 512 byte sectors on
13 Underlying block size can be set to > 4K to test buffering larger units.
17 ----------------
23 Full pathname to the underlying block-device,
24 or a "major:minor" device-number.
29 Number of sectors defining the logical block size to be emulated;
35 Number of sectors defining the logical block size of <dev path>.
37 If not provided, the logical block size of <dev path> will be used.
[all …]
/Documentation/virt/gunyah/
Dmessage-queue.rst1 .. SPDX-License-Identifier: GPL-2.0
5 Message queue is a simple low-capacity IPC channel between two virtual machines.
7 message queue is unidirectional and buffered in the hypervisor. A full-duplex
10 The size of the queue and the maximum size of the message that can be passed is
13 with a fixed maximum message size of 240 bytes. Longer messages require a
32 queue is being used to implement an RPC-like interface.
35 depth is the size of the queue (in other words: when queue is full, Rx
44 Clear-to-Send.
52 +-------------------+ +-----------------+ +-------------------+
57 | |-------->| | Rx vIRQ | |
[all …]
/Documentation/devicetree/bindings/clock/
Drenesas,5p35023.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Biju Das <biju.das.jz@bp.renesas.com>
14 is designed for low-power, consumer, and high-performance PCI
23 The driver can read a full register map from the DT, and will use that
26 must be done via the full register map, including optimized settings.
29 …renesas.com/us/en/products/clocks-timing/clock-generation/programmable-clocks/5p35023-versaclock-3…
34 - renesas,5p35023
39 '#clock-cells':
[all …]
/Documentation/networking/device_drivers/ethernet/intel/
De1000.rst1 .. SPDX-License-Identifier: GPL-2.0+
8 Copyright(c) 1999 - 2013 Intel Corporation.
13 - Identifying Your Adapter
14 - Command Line Parameters
15 - Speed and Duplex Configuration
16 - Additional Configurations
17 - Support
50 -------
54 :Valid Range: 0x01-0x0F, 0x20-0x2F
57 This parameter is a bit-mask that specifies the speed and duplex settings
[all …]

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