| /Documentation/i2c/ |
| D | i2c-sysfs.rst | 4 Linux I2C Sysfs
10 I2C topology can be complex because of the existence of I2C MUX
11 (I2C Multiplexer). The Linux
12 kernel abstracts the MUX channels into logical I2C bus numbers. However, there
13 is a gap of knowledge to map from the I2C bus physical number and MUX topology
14 to logical I2C bus number. This doc is aimed to fill in this gap, so the
16 the concept of logical I2C buses in the kernel, by knowing the physical I2C
17 topology and navigating through the I2C sysfs in Linux shell. This knowledge is
18 useful and essential to use ``i2c-tools`` for the purpose of development and
24 People who need to use Linux shell to interact with I2C subsystem on a system
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| /Documentation/i2c/busses/ |
| D | index.rst | 4 I2C Bus Drivers
10 i2c-ali1535
11 i2c-ali1563
12 i2c-ali15x3
13 i2c-amd756
14 i2c-amd8111
15 i2c-amd-mp2
16 i2c-diolan-u2c
17 i2c-i801
18 i2c-ismt
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| /Documentation/devicetree/bindings/i2c/ |
| D | i2c-imx.yaml | 4 $id: http://devicetree.org/schemas/i2c/i2c-imx.yaml#
7 title: Freescale Inter IC (I2C) and High Speed Inter IC (HS-I2C) for i.MX
13 - $ref: /schemas/i2c/i2c-controller.yaml#
18 - const: fsl,imx1-i2c
19 - const: fsl,imx21-i2c
20 - const: fsl,vf610-i2c
23 - fsl,ls1012a-i2c
24 - fsl,ls1021a-i2c
25 - fsl,ls1028a-i2c
26 - fsl,ls1043a-i2c
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| D | nvidia,tegra20-i2c.yaml | 4 $id: http://devicetree.org/schemas/i2c/nvidia,tegra20-i2c.yaml#
11 title: NVIDIA Tegra I2C controller driver
16 - description: Tegra20 has 4 generic I2C controller. This can support
17 master and slave mode of I2C communication. The i2c-tegra driver
18 only support master mode of I2C communication. Driver of I2C
19 controller is only compatible with "nvidia,tegra20-i2c".
20 const: nvidia,tegra20-i2c
21 - description: Tegra20 has specific I2C controller called as DVC I2C
22 controller. This only support master mode of I2C communication.
24 generic I2C controller. Driver of DVC I2C controller is only
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| D | renesas,rcar-i2c.yaml | 4 $id: http://devicetree.org/schemas/i2c/renesas,rcar-i2c.yaml#
7 title: Renesas R-Car I2C Controller
17 - renesas,i2c-r8a7778 # R-Car M1A
18 - renesas,i2c-r8a7779 # R-Car H1
19 - const: renesas,rcar-gen1-i2c # R-Car Gen1
23 - renesas,i2c-r8a7742 # RZ/G1H
24 - renesas,i2c-r8a7743 # RZ/G1M
25 - renesas,i2c-r8a7744 # RZ/G1N
26 - renesas,i2c-r8a7745 # RZ/G1E
27 - renesas,i2c-r8a77470 # RZ/G1C
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| D | i2c-mt65xx.yaml | 4 $id: http://devicetree.org/schemas/i2c/i2c-mt65xx.yaml#
7 title: MediaTek I2C controller
10 This driver interfaces with the native I2C controller present in
14 - $ref: /schemas/i2c/i2c-controller.yaml#
22 - const: mediatek,mt2712-i2c
23 - const: mediatek,mt6577-i2c
24 - const: mediatek,mt6589-i2c
25 - const: mediatek,mt7622-i2c
26 - const: mediatek,mt7981-i2c
27 - const: mediatek,mt7986-i2c
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| D | marvell,mv64xxx-i2c.yaml | 4 $id: http://devicetree.org/schemas/i2c/marvell,mv64xxx-i2c.yaml#
7 title: Marvell MV64XXX I2C Controller
15 - const: allwinner,sun4i-a10-i2c
17 - const: allwinner,sun7i-a20-i2c
18 - const: allwinner,sun4i-a10-i2c
19 - const: allwinner,sun6i-a31-i2c
22 - allwinner,suniv-f1c100s-i2c
23 - allwinner,sun8i-a23-i2c
24 - allwinner,sun8i-a83t-i2c
25 - allwinner,sun8i-v536-i2c
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| D | i2c-rk3x.yaml | 4 $id: http://devicetree.org/schemas/i2c/i2c-rk3x.yaml#
7 title: Rockchip RK3xxx I2C controller
10 This driver interfaces with the native I2C controller present in Rockchip
14 - $ref: /schemas/i2c/i2c-controller.yaml#
23 - const: rockchip,rv1108-i2c
24 - const: rockchip,rk3066-i2c
25 - const: rockchip,rk3188-i2c
26 - const: rockchip,rk3228-i2c
27 - const: rockchip,rk3288-i2c
28 - const: rockchip,rk3399-i2c
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| D | samsung,s3c2410-i2c.yaml | 4 $id: http://devicetree.org/schemas/i2c/samsung,s3c2410-i2c.yaml#
7 title: Samsung S3C/S5P/Exynos SoC I2C Controller
15 - samsung,s3c2410-i2c
16 - samsung,s3c2440-i2c
17 # For s3c2440-like I2C used inside HDMIPHY block found on several SoCs:
18 - samsung,s3c2440-hdmiphy-i2c
19 # For s3c2440-like I2C used as a host to SATA PHY controller on an
21 - samsung,exynos5-sata-phy-i2c
31 - const: i2c
37 for "samsung,s3c2440-hdmiphy-i2c" whose input/output lines are
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| D | i2c-mpc.yaml | 4 $id: http://devicetree.org/schemas/i2c/i2c-mpc.yaml#
7 title: I2C-Bus adapter for MPC824x/83xx/85xx/86xx/512x/52xx SoCs
13 - $ref: /schemas/i2c/i2c-controller.yaml#
20 - mpc5200-i2c
21 - fsl,mpc5200-i2c
22 - fsl,mpc5121-i2c
23 - fsl,mpc8313-i2c
24 - fsl,mpc8543-i2c
25 - fsl,mpc8544-i2c
26 - const: fsl-i2c
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| D | snps,designware-i2c.yaml | 4 $id: http://devicetree.org/schemas/i2c/snps,designware-i2c.yaml#
7 title: Synopsys DesignWare APB I2C Controller
13 - $ref: /schemas/i2c/i2c-controller.yaml#
19 const: mscc,ocelot-i2c
28 - description: Generic Synopsys DesignWare I2C controller
29 const: snps,designware-i2c
30 - description: Microsemi Ocelot SoCs I2C controller
32 - const: mscc,ocelot-i2c
33 - const: snps,designware-i2c
34 - description: Baikal-T1 SoC System I2C controller
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| D | hisilicon,ascend910-i2c.yaml | 4 $id: http://devicetree.org/schemas/i2c/hisilicon,ascend910-i2c.yaml#
7 title: HiSilicon common I2C controller
13 The HiSilicon common I2C controller can be used for many different
17 - $ref: /schemas/i2c/i2c-controller.yaml#
21 const: hisilicon,ascend910-i2c
35 i2c-sda-falling-time-ns:
38 i2c-scl-falling-time-ns:
41 i2c-sda-hold-time-ns:
44 i2c-scl-rising-time-ns:
47 i2c-digital-filter-width-ns:
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| D | i2c-mux.yaml | 4 $id: http://devicetree.org/schemas/i2c/i2c-mux.yaml#
7 title: Common i2c bus multiplexer/switch properties.
13 An i2c bus multiplexer/switch will have several child busses that are numbered
14 uniquely in a device dependent manner. The nodes for an i2c bus
17 For i2c multiplexers/switches that have child nodes that are a mixture of both
18 i2c child busses and other child nodes, the 'i2c-mux' subnode can be used for
19 populating the i2c child busses. If an 'i2c-mux' subnode is present, only
20 subnodes of this will be considered as i2c child busses.
24 pattern: '^(i2c-?)?mux'
33 '^i2c@[0-9a-f]+$':
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| D | ti,omap4-i2c.yaml | 4 $id: http://devicetree.org/schemas/i2c/ti,omap4-i2c.yaml#
7 title: I2C controllers on TI's OMAP and K3 SoCs
16 - ti,omap2420-i2c
17 - ti,omap2430-i2c
18 - ti,omap3-i2c
19 - ti,omap4-i2c
22 - ti,am4372-i2c
23 - ti,am64-i2c
24 - ti,am654-i2c
25 - ti,j721e-i2c
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| D | atmel,at91sam-i2c.yaml | 5 $id: http://devicetree.org/schemas/i2c/atmel,at91sam-i2c.yaml#
8 title: I2C for Atmel/Microchip platforms
18 - atmel,at91rm9200-i2c
19 - atmel,at91sam9261-i2c
20 - atmel,at91sam9260-i2c
21 - atmel,at91sam9g20-i2c
22 - atmel,at91sam9g10-i2c
23 - atmel,at91sam9x5-i2c
24 - atmel,sama5d4-i2c
25 - atmel,sama5d2-i2c
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| D | st,stm32-i2c.yaml | 4 $id: http://devicetree.org/schemas/i2c/st,stm32-i2c.yaml#
7 title: I2C controller embedded in STMicroelectronics STM32 I2C platform
13 - $ref: /schemas/i2c/i2c-controller.yaml#
19 - st,stm32f7-i2c
20 - st,stm32mp13-i2c
21 - st,stm32mp15-i2c
24 i2c-scl-rising-time-ns:
27 i2c-scl-falling-time-ns:
38 - st,stm32f4-i2c
47 - st,stm32f4-i2c
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| D | i2c-mux-gpmux.yaml | 4 $id: http://devicetree.org/schemas/i2c/i2c-mux-gpmux.yaml#
7 title: General Purpose I2C Bus Mux
13 This binding describes an I2C bus multiplexer that uses a mux controller
14 from the mux subsystem to route the I2C signals.
22 | | I2C |-|--| Mux |
32 - $ref: /schemas/i2c/i2c-mux.yaml#
36 const: i2c-mux
38 i2c-parent:
41 The phandle of the I2C bus that this multiplexer's master-side port is
47 The mux-controller states are the I2C sub-bus numbers.
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| D | nvidia,tegra186-bpmp-i2c.yaml | 4 $id: http://devicetree.org/schemas/i2c/nvidia,tegra186-bpmp-i2c.yaml#
7 title: NVIDIA Tegra186 (and later) BPMP I2C controller
15 owns certain HW devices, such as the I2C controller for the power
16 management I2C bus. Software running on other CPUs must perform IPC to
17 the BPMP in order to execute transactions on that I2C bus. This
18 binding describes an I2C bus that is accessed in such a fashion.
20 The BPMP I2C node must be located directly inside the main BPMP node.
24 This node represents an I2C controller. See ../i2c/i2c.txt for details
25 of the core I2C binding.
29 const: nvidia,tegra186-bpmp-i2c
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| D | i2c-sprd.txt | 1 I2C for Spreadtrum platforms
4 - compatible: Should be "sprd,sc9860-i2c".
7 - interrupts: Should contain I2C interrupt.
9 "i2c" for I2C clock,
10 "source" for I2C source (parent) clock,
11 "enable" for I2C module enable clock.
13 - clock-frequency: Contains desired I2C bus clock frequency in Hz.
14 - #address-cells: Should be 1 to describe address cells for I2C device address.
15 - #size-cells: Should be 0 means no size cell for I2C device address.
18 - Child nodes conforming to I2C bus binding
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| D | i2c-demux-pinctrl.txt | 1 Pinctrl-based I2C Bus DeMux
3 This binding describes an I2C bus demultiplexer that uses pin multiplexing to
4 route the I2C signals, and represents the pin multiplexing configuration using
5 the pinctrl device tree bindings. This may be used to select one I2C IP core at
6 runtime which may have a better feature set for a given task than another I2C
14 | |I2C IP Core1|--\ | +-----+ +-----+
18 | |I2C IP Core2|--/ |
24 - compatible: "i2c-demux-pinctrl"
25 - i2c-parent: List of phandles of I2C masters available for selection. The first
27 - i2c-bus-name: The name of this bus. Also needed as pinctrl-name for the I2C
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| /Documentation/devicetree/bindings/net/ |
| D | mctp-i2c-controller.yaml | 4 $id: http://devicetree.org/schemas/net/mctp-i2c-controller.yaml#
7 title: MCTP I2C transport
13 An mctp-i2c-controller defines a local MCTP endpoint on an I2C controller.
14 MCTP I2C is specified by DMTF DSP0237.
16 An mctp-i2c-controller must be attached to an I2C adapter which supports
17 slave functionality. I2C busses (either directly or as subordinate mux
18 busses) are attached to the mctp-i2c-controller with a 'mctp-controller'
19 property on each used bus. Each mctp-controller I2C bus will be presented
20 to the host system as a separate MCTP I2C instance.
24 const: mctp-i2c-controller
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| /Documentation/devicetree/bindings/ |
| D | unittest.txt | 15 2) OF unittest i2c adapter platform device
20 - compatible: must be unittest-i2c-bus
22 Children nodes contain unittest i2c devices.
25 unittest-i2c-bus {
26 compatible = "unittest-i2c-bus";
29 3) OF unittest i2c device
31 ** I2C unittest device
34 - compatible: must be unittest-i2c-dev
39 unittest-i2c-dev {
40 compatible = "unittest-i2c-dev";
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| D | trivial-devices.yaml | 7 title: Trivial I2C and SPI devices
13 This is a list of trivial I2C and SPI devices that have simple device tree
34 … # SMBus/I2C Digital Temperature Sensor in 6-Pin SOT with SMBus Alert and Over Temperature Pin
50 # i2c serial eeprom (24cxx)
52 # i2c trusted platform module (TPM)
54 # ATSHA204 - i2c h/w symmetric crypto module
56 # ATSHA204A - i2c h/w symmetric crypto module
58 # i2c h/w elliptic curve crypto module
92 # Devantech SRF02 ultrasonic ranger in I2C mode
102 # DMARD05: 3-axis I2C Accelerometer
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| /Documentation/devicetree/bindings/soc/fsl/cpm_qe/cpm/ |
| D | i2c.txt | 1 * I2C
3 The I2C controller is expressed as a bus under the CPM node.
6 - compatible : "fsl,cpm1-i2c", "fsl,cpm2-i2c"
7 - reg : On CPM2 devices, the second resource doesn't specify the I2C
10 - #address-cells : Should be one. The cell is the i2c device address with
13 - clock-frequency : Can be used to set the i2c clock frequency. If
16 i2c drivers to find the bus to probe:
17 - linux,i2c-index : Can be used to hard code an i2c bus number. By default,
18 the bus number is dynamically assigned by the i2c core.
19 - linux,i2c-class : Can be used to override the i2c class. The class is used
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| /Documentation/driver-api/ |
| D | i2c.rst | 4 I\ :sup:`2`\ C (or without fancy typography, "I2C") is an acronym for
8 the same bus. I2C only needs two signals (SCL for clock, SDA for data),
10 I2C devices use seven bit addresses, and bus speeds of up to 400 kHz;
12 I2C is a multi-master bus; open drain signaling is used to arbitrate
16 The Linux I2C programming interfaces support the master side of bus
18 structured around two kinds of driver, and two kinds of device. An I2C
22 I2C bus segment it manages. On each I2C bus segment will be I2C devices
26 are functions to perform various I2C protocol operations; at this writing
30 systems are also I2C conformant. The electrical constraints are tighter
32 Controllers that support I2C can also support most SMBus operations, but
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