Searched +full:imx8mq +full:- +full:mipi +full:- +full:dphy (Results 1 – 3 of 3) sorted by relevance
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)3 ---4 $id: http://devicetree.org/schemas/phy/mixel,mipi-dsi-phy.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#10 - Guido Günther <agx@sigxcpu.org>13 The Mixel MIPI-DSI PHY IP block is e.g. found on i.MX8 platforms (along the14 MIPI-DSI IP from Northwest Logic). It represents the physical layer for the18 in either MIPI-DSI PHY mode or LVDS PHY mode.23 - fsl,imx8mq-mipi-dphy24 - fsl,imx8qxp-mipi-dphy[all …]
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)3 ---4 $id: http://devicetree.org/schemas/media/nxp,imx8mq-mipi-csi2.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#7 title: NXP i.MX8MQ MIPI CSI-2 receiver10 - Martin Kepplinger <martin.kepplinger@puri.sm>12 description: |-13 This binding covers the CSI-2 RX PHY and host controller included in the20 - fsl,imx8mq-mipi-csi227 - description: core is the RX Controller Core Clock input. This clock[all …]
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)3 ---4 $id: http://devicetree.org/schemas/display/bridge/nwl-dsi.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#7 title: Northwest Logic MIPI-DSI controller on i.MX SoCs10 - Guido Gúnther <agx@sigxcpu.org>11 - Robert Chiras <robert.chiras@nxp.com>14 NWL MIPI-DSI host controller found on i.MX8 platforms. This is a dsi bridge for15 the SOCs NWL MIPI-DSI host controller.18 - $ref: ../dsi-controller.yaml#[all …]