Searched +full:interrupt +full:- +full:names (Results 1 – 25 of 1024) sorted by relevance
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/Documentation/devicetree/bindings/pci/ |
D | mediatek-pcie.txt | 4 - compatible: Should contain one of the following strings: 5 "mediatek,mt2701-pcie" 6 "mediatek,mt2712-pcie" 7 "mediatek,mt7622-pcie" 8 "mediatek,mt7623-pcie" 9 "mediatek,mt7629-pcie" 10 "airoha,en7523-pcie" 11 - device_type: Must be "pci" 12 - reg: Base addresses and lengths of the root ports. 13 - reg-names: Names of the above areas to use during resource lookup. [all …]
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D | rockchip-dw-pcie.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pci/rockchip-dw-pcie.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Shawn Lin <shawn.lin@rock-chips.com> 11 - Simon Xue <xxm@rock-chips.com> 12 - Heiko Stuebner <heiko@sntech.de> 17 snps,dw-pcie.yaml. 20 - $ref: /schemas/pci/snps,dw-pcie.yaml# 25 - const: rockchip,rk3568-pcie [all …]
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D | mediatek-pcie-gen3.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pci/mediatek-pcie-gen3.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Jianjun Wang <jianjun.wang@mediatek.com> 19 +-----+ 21 +-----+ 24 port->irq 26 +-+-+-+-+-+-+-+-+ 28 +-+-+-+-+-+-+-+-+ [all …]
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D | amlogic,axg-pcie.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pci/amlogic,axg-pcie.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Neil Armstrong <neil.armstrong@linaro.org> 16 - $ref: /schemas/pci/pci-bus.yaml# 17 - $ref: /schemas/pci/snps,dw-pcie-common.yaml# 19 # We need a select here so we don't match all nodes with 'snps,dw-pcie' 24 - amlogic,axg-pcie 25 - amlogic,g12a-pcie [all …]
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D | rockchip,rk3399-pcie.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pci/rockchip,rk3399-pcie.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Shawn Lin <shawn.lin@rock-chips.com> 13 - $ref: /schemas/pci/pci-bus.yaml# 14 - $ref: rockchip,rk3399-pcie-common.yaml# 18 const: rockchip,rk3399-pcie 22 reg-names: 24 - const: axi-base [all …]
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D | socionext,uniphier-pcie.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pci/socionext,uniphier-pcie.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 13 Documentation/devicetree/bindings/pci/snps,dw-pcie.yaml. 16 - Kunihiko Hayashi <hayashi.kunihiko@socionext.com> 19 - $ref: /schemas/pci/snps,dw-pcie.yaml# 24 - socionext,uniphier-pcie 30 reg-names: 33 - const: dbi [all …]
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/Documentation/devicetree/bindings/sound/ |
D | xlnx,audio-formatter.txt | 1 Device-Tree bindings for Xilinx PL audio formatter 3 The IP core supports DMA, data formatting(AES<->PCM conversion) 7 - compatible: "xlnx,audio-formatter-1.0" 8 - interrupt-names: Names specified to list of interrupts in same 10 List of supported interrupt names are: 11 "irq_mm2s" : interrupt from MM2S block 12 "irq_s2mm" : interrupt from S2MM block 13 - interrupts-parent: Phandle for interrupt controller. 14 - interrupts: List of Interrupt numbers. 15 - reg: Base address and size of the IP core instance. [all …]
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D | qcom,wcd9335.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Srinivas Kandagatla <srinivas.kandagatla@linaro.org> 13 Qualcomm WCD9335 Codec is a standalone Hi-Fi audio codec IC with in-built 14 Soundwire controller and interrupt mux. It supports both I2S/I2C and SLIMbus 27 clock-names: 29 - const: mclk 30 - const: slimbus 35 interrupt-names: [all …]
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/Documentation/devicetree/bindings/display/tegra/ |
D | nvidia,tegra20-host1x.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only 3 --- 4 $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra20-host1x.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Thierry Reding <thierry.reding@gmail.com> 11 - Jon Hunter <jonathanh@nvidia.com> 13 description: The host1x top-level node defines a number of children, each 19 - enum: 20 - nvidia,tegra20-host1x 21 - nvidia,tegra30-host1x [all …]
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/Documentation/devicetree/bindings/remoteproc/ |
D | qcom,pas-common.yaml | 1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/remoteproc/qcom,pas-common.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> 20 clock-names: 30 - description: Watchdog interrupt 31 - description: Fatal interrupt 32 - description: Ready interrupt 33 - description: Handover interrupt [all …]
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D | qcom,sdm845-adsp-pil.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/remoteproc/qcom,sdm845-adsp-pil.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Bjorn Andersson <bjorn.andersson@linaro.org> 19 - qcom,sdm845-adsp-pil 28 - description: Watchdog interrupt 29 - description: Fatal interrupt 30 - description: Ready interrupt 31 - description: Handover interrupt [all …]
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D | qcom,qcs404-cdsp-pil.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/remoteproc/qcom,qcs404-cdsp-pil.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Bjorn Andersson <bjorn.andersson@linaro.org> 19 - qcom,qcs404-cdsp-pil 28 - description: Watchdog interrupt 29 - description: Fatal interrupt 30 - description: Ready interrupt 31 - description: Handover interrupt [all …]
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/Documentation/devicetree/bindings/net/ |
D | idt,3243x-emac.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/net/idt,3243x-emac.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 12 - Thomas Bogendoerfer <tsbogend@alpha.franken.de> 15 - $ref: ethernet-controller.yaml# 19 const: idt,3243x-emac 24 reg-names: 26 - const: emac 27 - const: dma_rx [all …]
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D | nixge.txt | 4 - compatible: Should be "ni,xge-enet-3.00", but can be "ni,xge-enet-2.00" for 5 older device trees with DMA engines co-located in the address map, 7 - reg: Address and length of the register set for the device. It contains the 8 information of registers in the same order as described by reg-names. 9 - reg-names: Should contain the reg names 12 - interrupts: Should contain tx and rx interrupt 13 - interrupt-names: Should be "rx" and "tx" 14 - phy-mode: See ethernet.txt file in the same directory. 15 - nvmem-cells: Phandle of nvmem cell containing the MAC address 16 - nvmem-cell-names: Should be "address" [all …]
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/Documentation/devicetree/bindings/serial/ |
D | brcm,bcm7271-uart.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/serial/brcm,bcm7271-uart.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Al Cooper <alcooperx@gmail.com> 13 - $ref: serial.yaml# 23 - enum: 24 - brcm,bcm7271-uart 25 - brcm,bcm7278-uart 31 reg-names: [all …]
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/Documentation/devicetree/bindings/hsi/ |
D | omap-ssi.txt | 9 - compatible: Should include "ti,omap3-ssi" or "ti,omap4-hsi" 10 - reg-names: Contains the values "sys" and "gdd" (in this order). 11 - reg: Contains a matching register specifier for each entry 12 in reg-names. 13 - interrupt-names: Contains the value "gdd_mpu". 14 - interrupts: Contains matching interrupt information for each entry 15 in interrupt-names. 16 - ranges: Represents the bus address mapping between the main 18 - clock-names: Must include the following entries: 22 - clocks: Contains a matching clock specifier for each entry in [all …]
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/Documentation/devicetree/bindings/crypto/ |
D | fsl-imx-scc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/crypto/fsl-imx-scc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Steffen Trumtrar <s.trumtrar@pengutronix.de> 14 const: fsl,imx25-scc 21 - description: SCC SCM interrupt 22 - description: SCC SMN interrupt 24 interrupt-names: 26 - const: scm [all …]
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/Documentation/devicetree/bindings/usb/ |
D | cdns,usb3.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Cadence USBSS-DRD controller 10 - Pawel Laszczak <pawell@cadence.com> 18 - description: OTG controller registers 19 - description: XHCI Host controller registers 20 - description: DEVICE controller registers 22 reg-names: 24 - const: otg [all …]
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/Documentation/devicetree/bindings/phy/ |
D | rockchip,inno-usb2phy.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/phy/rockchip,inno-usb2phy.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Heiko Stuebner <heiko@sntech.de> 15 - rockchip,px30-usb2phy 16 - rockchip,rk3128-usb2phy 17 - rockchip,rk3228-usb2phy 18 - rockchip,rk3308-usb2phy 19 - rockchip,rk3328-usb2phy [all …]
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/Documentation/devicetree/bindings/power/supply/ |
D | cpcap-battery.yaml | 1 # SPDX-License-Identifier: GPL-2.0 4 --- 5 $id: http://devicetree.org/schemas/power/supply/cpcap-battery.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Tony Lindgren <tony@atomide.com> 12 - Sebastian Reichel <sre@kernel.org> 17 sub-function. 20 - $ref: power-supply.yaml# 24 const: motorola,cpcap-battery 28 - description: eol interrupt [all …]
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D | cpcap-charger.yaml | 1 # SPDX-License-Identifier: GPL-2.0 4 --- 5 $id: http://devicetree.org/schemas/power/supply/cpcap-charger.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Tony Lindgren <tony@atomide.com> 12 - Sebastian Reichel <sre@kernel.org> 17 sub-function. 20 - $ref: power-supply.yaml# 24 const: motorola,mapphone-cpcap-charger 28 - description: charger detection interrupt [all …]
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/Documentation/devicetree/bindings/interrupt-controller/ |
D | loongson,liointc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/interrupt-controller/loongson,liointc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Loongson Local I/O Interrupt Controller 10 - Jiaxun Yang <jiaxun.yang@flygoat.com> 13 This interrupt controller is found in the Loongson-3 family of chips and 14 Loongson-2K1000 chip, as the primary package interrupt controller which 15 can route local I/O interrupt to interrupt lines of cores. 18 - $ref: /schemas/interrupt-controller.yaml# [all …]
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/Documentation/devicetree/bindings/gpu/ |
D | nvidia,gk20a.txt | 4 - compatible: "nvidia,<gpu>" 6 - nvidia,gk20a 7 - nvidia,gm20b 8 - nvidia,gp10b 9 - nvidia,gv11b 10 - reg: Physical base address and length of the controller's registers. 12 - first entry for bar0 13 - second entry for bar1 14 - interrupts: Must contain an entry for each entry in interrupt-names. 15 See ../interrupt-controller/interrupts.txt for details. [all …]
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/Documentation/devicetree/bindings/mailbox/ |
D | ti,secure-proxy.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/mailbox/ti,secure-proxy.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Nishanth Menon <nm@ti.com> 16 called "threads" or "proxies" - each instance is unidirectional and is 22 pattern: "^mailbox@[0-9a-f]+$" 25 const: ti,am654-secure-proxy 27 "#mbox-cells": 32 reg-names: [all …]
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/Documentation/devicetree/bindings/spi/ |
D | spi-sunplus-sp7021.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 4 --- 5 $id: http://devicetree.org/schemas/spi/spi-sunplus-sp7021.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - $ref: spi-controller.yaml 14 - Li-hao Kuo <lhjeff911@gmail.com> 19 - sunplus,sp7021-spi 23 - description: the SPI master registers 24 - description: the SPI slave registers 26 reg-names: [all …]
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