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/drivers/gpu/drm/msm/
DKconfig4 tristate "MSM DRM"
35 DRM/KMS driver for MSM/snapdragon.
61 bool "Enable MDP4 support in MSM DRM driver"
66 the MSM DRM driver. It is the older display controller found in
70 bool "Enable MDP5 support in MSM DRM driver"
76 the MSM DRM driver. It is the display controller found in devices
80 bool "Enable DPU support in MSM DRM driver"
86 the MSM DRM driver. It is the display controller found in devices
90 bool "Enable DisplayPort support in MSM DRM driver"
95 Compile in support for DP driver in MSM DRM driver. DP external
[all …]
DMakefile7 msm-y := \
20 msm-$(CONFIG_DRM_MSM_HDMI) += \
33 msm-$(CONFIG_DRM_MSM_MDP4) += \
44 msm-$(CONFIG_DRM_MSM_MDP5) += \
57 msm-$(CONFIG_DRM_MSM_DPU) += \
86 msm-$(CONFIG_DRM_MSM_MDSS) += \
89 msm-y += \
116 msm-$(CONFIG_DEBUG_FS) += adreno/a5xx_debugfs.o \
119 msm-$(CONFIG_DRM_MSM_GPU_STATE) += adreno/a6xx_gpu_state.o
121 msm-$(CONFIG_DRM_MSM_DP)+= dp/dp_aux.o \
[all …]
Dmsm_gem_shrinker.c208 * msm_gem_shrinker_init - Initialize msm shrinker
211 * This function registers and sets up the msm shrinker.
226 * msm_gem_shrinker_cleanup - Clean up msm shrinker
229 * This function unregisters the msm shrinker.
Dmsm_drv.c36 * MSM driver version:
354 * mach-msm: in msm_init_vram()
424 priv->wq = alloc_ordered_workqueue("msm", 0); in msm_drm_init()
722 * 9ef364432db4 ("drm/msm: deprecate MSM_BO_UNCACHED (map as writecombine instead)") in msm_ioctl_gem_new()
1097 .name = "msm",
1098 .desc = "MSM Snapdragon DRM",
1309 .name = "msm",
1349 MODULE_DESCRIPTION("MSM DRM Driver");
Dmsm_dsc_helper.h5 * Helper methods for MSM-specific DSC calculations that are common between timing engine,
/drivers/gpu/drm/ci/
Dtest.yml85 msm:sc7180:
88 stage: msm
91 DRIVER_NAME: msm
99 msm:apq8016:
102 stage: msm
104 DRIVER_NAME: msm
118 msm:apq8096:
121 stage: msm
123 DRIVER_NAME: msm
131 msm:sdm845:
[all …]
/drivers/net/ethernet/aquantia/atlantic/hw_atl/
Dhw_atl_llh.h71 /* get msm rx errors counter register */
74 /* get msm rx unicast frames counter register */
77 /* get msm rx multicast frames counter register */
80 /* get msm rx broadcast frames counter register */
83 /* get msm rx broadcast octets counter register 1 */
86 /* get msm rx unicast octets counter register 0 */
89 /* get msm tx errors counter register */
92 /* get msm tx unicast frames counter register */
95 /* get msm tx multicast frames counter register */
98 /* get msm tx broadcast frames counter register */
[all …]
Dhw_atl_llh_internal.h68 /* preprocessor definitions for msm rx errors counter register */
71 /* preprocessor definitions for msm rx unicast frames counter register */
74 /* preprocessor definitions for msm rx multicast frames counter register */
77 /* preprocessor definitions for msm rx broadcast frames counter register */
80 /* preprocessor definitions for msm rx broadcast octets counter register 1 */
83 /* preprocessor definitions for msm rx broadcast octets counter register 2 */
86 /* preprocessor definitions for msm rx unicast octets counter register 0 */
89 /* preprocessor definitions for msm tx unicast frames counter register */
92 /* preprocessor definitions for msm tx multicast frames counter register */
2561 /* mac_phy msm register address[7:0] bitfield definitions
[all …]
/drivers/gpu/drm/msm/disp/dpu1/
Ddpu_core_irq.h13 * @kms: MSM KMS handle
20 * @kms: MSM KMS handle
27 * @kms: MSM KMS handle
/drivers/pinctrl/qcom/
Dpinctrl-qdf2xxx.c6 * device. The driver which controls this device is pinctrl-msm.c. Each
8 * with pinctrl-msm.c. This means that all TLMM drivers are pin control
15 * pinctrl-msm.c into another driver.
23 #include "pinctrl-msm.h"
/drivers/iommu/arm/arm-smmu/
Dqcom_iommu.c676 if (of_device_is_compatible(dev->of_node, "qcom,msm-iommu-v2-sec")) in qcom_iommu_ctx_probe()
721 { .compatible = "qcom,msm-iommu-v1-ns" },
722 { .compatible = "qcom,msm-iommu-v1-sec" },
723 { .compatible = "qcom,msm-iommu-v2-ns" },
724 { .compatible = "qcom,msm-iommu-v2-sec" },
742 if (of_device_is_compatible(child, "qcom,msm-iommu-v1-sec") || in qcom_iommu_has_secure_context()
743 of_device_is_compatible(child, "qcom,msm-iommu-v2-sec")) { in qcom_iommu_has_secure_context()
886 { .compatible = "qcom,msm-iommu-v1" },
887 { .compatible = "qcom,msm-iommu-v2" },
/drivers/mfd/
Dcs42l43.c441 CS42L43_IRQ_REG(HP_STARTUP_DONE, MSM),
442 CS42L43_IRQ_REG(HP_SHUTDOWN_DONE, MSM),
443 CS42L43_IRQ_REG(HSDET_DONE, MSM),
444 CS42L43_IRQ_REG(TIPSENSE_UNPLUG_DB, MSM),
445 CS42L43_IRQ_REG(TIPSENSE_PLUG_DB, MSM),
446 CS42L43_IRQ_REG(RINGSENSE_UNPLUG_DB, MSM),
447 CS42L43_IRQ_REG(RINGSENSE_PLUG_DB, MSM),
448 CS42L43_IRQ_REG(TIPSENSE_UNPLUG_PDET, MSM),
449 CS42L43_IRQ_REG(TIPSENSE_PLUG_PDET, MSM),
450 CS42L43_IRQ_REG(RINGSENSE_UNPLUG_PDET, MSM),
[all …]
/drivers/spmi/
DKconfig24 tristate "Qualcomm MSM SPMI Controller (PMIC Arbiter)"
31 built-in SPMI PMIC Arbiter interface on Qualcomm MSM family
/drivers/input/misc/
Dhp_sdc_rtc.c2 * HP i8042 SDC + MSM-58321 BBRTC driver.
51 MODULE_DESCRIPTION("HP i8042 SDC + MSM-58321 RTC Driver");
119 /* MSM-58321 has no read latch, so must read twice and compare. */ in hp_sdc_rtc_read_bbrtc()
363 printk(KERN_INFO "HP i8042 SDC + MSM-58321 RTC support loaded " in hp_sdc_rtc_init()
373 printk(KERN_INFO "HP i8042 SDC + MSM-58321 RTC support unloaded\n"); in hp_sdc_rtc_exit()
/drivers/iommu/
Dmsm_iommu.h12 /* Sharability attributes of MSM IOMMU mappings */
16 /* Cacheability attributes of MSM IOMMU mappings */
/drivers/net/ipa/
Dipa_qmi_msg.h84 IPA_QMI_PLATFORM_TYPE_MSM_ANDROID = 0x3, /* Android MSM */
85 IPA_QMI_PLATFORM_TYPE_MSM_WINDOWS = 0x4, /* Windows MSM */
86 IPA_QMI_PLATFORM_TYPE_MSM_QNX_V01 = 0x5, /* QNX MSM */
/drivers/net/ethernet/aquantia/atlantic/hw_atl2/
Dhw_atl2_utils_fw.c347 ((s64)(stats->a0.msm._F - priv->last_stats.a0.msm._F)) >= 0) \ in aq_a2_fill_a0_stats()
348 curr_stats._N += stats->a0.msm._F - priv->last_stats.a0.msm._F;\ in aq_a2_fill_a0_stats()
/drivers/phy/qualcomm/
DKconfig126 USB IPs on MSM SOCs.
192 IPs on MSM SOCs.
/drivers/tty/serial/
Dmsm_serial.c1346 return "MSM"; in msm_type()
1726 OF_EARLYCON_DECLARE(msm_serial, "qcom,msm-uart",
1747 OF_EARLYCON_DECLARE(msm_serial_dm, "qcom,msm-uartdm",
1779 { .compatible = "qcom,msm-uartdm-v1.1", .data = (void *)UARTDM_1P1 },
1780 { .compatible = "qcom,msm-uartdm-v1.2", .data = (void *)UARTDM_1P2 },
1781 { .compatible = "qcom,msm-uartdm-v1.3", .data = (void *)UARTDM_1P3 },
1782 { .compatible = "qcom,msm-uartdm-v1.4", .data = (void *)UARTDM_1P4 },
1856 { .compatible = "qcom,msm-uart" },
1857 { .compatible = "qcom,msm-uartdm" },
/drivers/media/platform/qcom/camss/
Dcamss-csid-gen1.h5 * Qualcomm MSM Camera Subsystem - CSID (CSI Decoder) Module Generation 1
Dcamss-csid-gen2.h5 * Qualcomm MSM Camera Subsystem - CSID (CSI Decoder) Module Generation 1
Dcamss-video.h5 * Qualcomm MSM Camera Subsystem - V4L2 device node
/drivers/gpu/drm/ci/xfails/
Dmsm-sc7180-skips.txt10 # too gracefully.. https://gitlab.freedesktop.org/drm/msm/-/issues/15
/drivers/usb/chipidea/
DKconfig43 tristate "Enable MSM hsusb glue driver" if EXPERT
/drivers/power/reset/
Dmsm-poweroff.c58 .name = "msm-restart",

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