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/drivers/clk/mediatek/
DKconfig773 tristate "Clock driver for MediaTek MT8192"
779 This driver supports MediaTek MT8192 basic clocks.
782 tristate "Clock driver for MediaTek MT8192 audsys"
786 This driver supports MediaTek MT8192 audsys clocks.
789 tristate "Clock driver for MediaTek MT8192 camsys"
793 This driver supports MediaTek MT8192 camsys and camsys_raw clocks.
796 tristate "Clock driver for MediaTek MT8192 imgsys"
800 This driver supports MediaTek MT8192 imgsys and imgsys2 clocks.
803 tristate "Clock driver for MediaTek MT8192 imp_iic_wrap"
807 This driver supports MediaTek MT8192 imp_iic_wrap clocks.
[all …]
Dclk-mt8192-imp_iic_wrap.c13 #include <dt-bindings/clock/mt8192-clk.h>
89 .compatible = "mediatek,mt8192-imp_iic_wrap_c",
92 .compatible = "mediatek,mt8192-imp_iic_wrap_e",
95 .compatible = "mediatek,mt8192-imp_iic_wrap_n",
98 .compatible = "mediatek,mt8192-imp_iic_wrap_s",
101 .compatible = "mediatek,mt8192-imp_iic_wrap_w",
104 .compatible = "mediatek,mt8192-imp_iic_wrap_ws",
116 .name = "clk-mt8192-imp_iic_wrap",
DMakefile116 obj-$(CONFIG_COMMON_CLK_MT8192) += clk-mt8192-apmixedsys.o clk-mt8192.o
117 obj-$(CONFIG_COMMON_CLK_MT8192_AUDSYS) += clk-mt8192-aud.o
118 obj-$(CONFIG_COMMON_CLK_MT8192_CAMSYS) += clk-mt8192-cam.o
119 obj-$(CONFIG_COMMON_CLK_MT8192_IMGSYS) += clk-mt8192-img.o
120 obj-$(CONFIG_COMMON_CLK_MT8192_IMP_IIC_WRAP) += clk-mt8192-imp_iic_wrap.o
121 obj-$(CONFIG_COMMON_CLK_MT8192_IPESYS) += clk-mt8192-ipe.o
122 obj-$(CONFIG_COMMON_CLK_MT8192_MDPSYS) += clk-mt8192-mdp.o
123 obj-$(CONFIG_COMMON_CLK_MT8192_MFGCFG) += clk-mt8192-mfg.o
124 obj-$(CONFIG_COMMON_CLK_MT8192_MMSYS) += clk-mt8192-mm.o
125 obj-$(CONFIG_COMMON_CLK_MT8192_MSDC) += clk-mt8192-msdc.o
[all …]
Dclk-mt8192-cam.c13 #include <dt-bindings/clock/mt8192-clk.h>
83 .compatible = "mediatek,mt8192-camsys",
86 .compatible = "mediatek,mt8192-camsys_rawa",
89 .compatible = "mediatek,mt8192-camsys_rawb",
92 .compatible = "mediatek,mt8192-camsys_rawc",
104 .name = "clk-mt8192-cam",
Dclk-mt8192-img.c13 #include <dt-bindings/clock/mt8192-clk.h>
52 .compatible = "mediatek,mt8192-imgsys",
55 .compatible = "mediatek,mt8192-imgsys2",
67 .name = "clk-mt8192-img",
Dclk-mt8192-vdec.c13 #include <dt-bindings/clock/mt8192-clk.h>
76 .compatible = "mediatek,mt8192-vdecsys",
79 .compatible = "mediatek,mt8192-vdecsys_soc",
91 .name = "clk-mt8192-vdec",
Dclk-mt8192-scp_adsp.c13 #include <dt-bindings/clock/mt8192-clk.h>
35 .compatible = "mediatek,mt8192-scp_adsp",
47 .name = "clk-mt8192-scp_adsp",
Dclk-mt8192-mfg.c13 #include <dt-bindings/clock/mt8192-clk.h>
37 .compatible = "mediatek,mt8192-mfgcfg",
49 .name = "clk-mt8192-mfg",
Dclk-mt8192-venc.c13 #include <dt-bindings/clock/mt8192-clk.h>
38 .compatible = "mediatek,mt8192-vencsys",
50 .name = "clk-mt8192-venc",
Dclk-mt8192-apmixedsys.c9 #include <dt-bindings/clock/mt8192-clk.h>
147 { .compatible = "mediatek,mt8192-apmixedsys" },
156 const u8 *fhctl_node = "mediatek,mt8192-fhctl"; in clk_mt8192_apmixed_probe()
205 .name = "clk-mt8192-apmixed",
212 MODULE_DESCRIPTION("MediaTek MT8192 apmixed clocks driver");
Dclk-mt8192-ipe.c13 #include <dt-bindings/clock/mt8192-clk.h>
42 .compatible = "mediatek,mt8192-ipesys",
54 .name = "clk-mt8192-ipe",
Dclk-mt8192-msdc.c13 #include <dt-bindings/clock/mt8192-clk.h>
49 .compatible = "mediatek,mt8192-msdc_top",
61 .name = "clk-mt8192-msdc",
Dclk-mt8192-mdp.c13 #include <dt-bindings/clock/mt8192-clk.h>
67 .compatible = "mediatek,mt8192-mdpsys",
79 .name = "clk-mt8192-mdp",
Dclk-mt8192-aud.c13 #include <dt-bindings/clock/mt8192-clk.h>
107 { .compatible = "mediatek,mt8192-audsys", .data = &aud_desc },
116 .name = "clk-mt8192-aud",
Dclk-mt8192-mm.c12 #include <dt-bindings/clock/mt8192-clk.h>
89 { .name = "clk-mt8192-mm", .driver_data = (kernel_ulong_t)&mm_desc },
98 .name = "clk-mt8192-mm",
Dclk-mt8192.c17 #include <dt-bindings/clock/mt8192-clk.h>
18 #include <dt-bindings/reset/mt8192-resets.h>
1016 { .compatible = "mediatek,mt8192-infracfg", .data = &infra_desc },
1017 { .compatible = "mediatek,mt8192-pericfg", .data = &peri_desc },
1018 { .compatible = "mediatek,mt8192-topckgen", .data = &topck_desc },
1025 .name = "clk-mt8192",
/drivers/gpu/drm/ci/
Dtest.yml294 # drm-mtk doesn't even probe yet in mainline for mt8192
295 .mediatek:mt8192:
300 DEVICE_TYPE: mt8192-asurada-spherion-r0
301 GPU_VERSION: mt8192
302 RUNNER_TAG: mesa-ci-x86-64-lava-mt8192-asurada-spherion-r0
/drivers/gpu/drm/mediatek/
Dmtk_drm_drv.c332 { .compatible = "mediatek,mt8192-mmsys",
664 { .compatible = "mediatek,mt8192-disp-aal",
670 { .compatible = "mediatek,mt8192-disp-ccorr",
706 { .compatible = "mediatek,mt8192-disp-mutex",
720 { .compatible = "mediatek,mt8192-disp-ovl",
726 { .compatible = "mediatek,mt8192-disp-ovl-2l",
728 { .compatible = "mediatek,mt8192-disp-postmask",
762 { .compatible = "mediatek,mt8192-dpi",
Dmtk_disp_ccorr.c93 /* identity value 0x100000000 -> 0x800(mt8192), */ in mtk_ctm_s31_32_to_s1_n()
208 { .compatible = "mediatek,mt8192-disp-ccorr",
/drivers/soc/mediatek/
Dmtk-infracfg.c82 * MT8192 has an experimental path to route GPU traffic to the DSU's in mtk_infracfg_init()
87 infracfg = syscon_regmap_lookup_by_compatible("mediatek,mt8192-infracfg"); in mtk_infracfg_init()
Dmtk-mmsys.c22 #include "mt8192-mmsys.h"
93 .clk_driver = "clk-mt8192-mm",
434 { .compatible = "mediatek,mt8192-mmsys", .data = &mt8192_mmsys_driver_data },
/drivers/pmdomain/mediatek/
Dmt8192-pm-domains.h7 #include <dt-bindings/power/mt8192-power.h>
10 * MT8192 power domain support
/drivers/pinctrl/mediatek/
DMakefile35 obj-$(CONFIG_PINCTRL_MT8192) += pinctrl-mt8192.o
DKconfig231 bool "MediaTek MT8192 pin control"
/drivers/watchdog/
Dmtk_wdt.c18 #include <dt-bindings/reset/mt8192-resets.h>
450 { .compatible = "mediatek,mt8192-wdt", .data = &mt8192_data },

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