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/Documentation/devicetree/bindings/rtc/
Dtrivial-rtc.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/rtc/trivial-rtc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Alexandre Belloni <alexandre.belloni@bootlin.com>
18 - $ref: rtc.yaml#
23 # AB-RTCMC-32.768kHz-B5ZE-S3: Real Time Clock/Calendar Module with I2C Interface
24 - abracon,abb5zes3
25 # AB-RTCMC-32.768kHz-EOZ9: Real Time Clock/Calendar Module with I2C Interface
26 - abracon,abeoz9
[all …]
Dxgene-rtc.txt1 * APM X-Gene Real Time Clock
3 RTC controller for the APM X-Gene Real Time Clock
6 - compatible : Should be "apm,xgene-rtc"
7 - reg: physical base address of the controller and length of memory mapped
9 - interrupts: IRQ line for the RTC.
10 - #clock-cells: Should be 1.
11 - clocks: Reference to the clock entry.
16 compatible = "fixed-clock";
17 #clock-cells = <1>;
18 clock-frequency = <100000000>;
[all …]
Dxlnx,zynqmp-rtc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/rtc/xlnx,zynqmp-rtc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Xilinx Zynq Ultrascale+ MPSoC Real Time Clock
10 RTC controller for the Xilinx Zynq MPSoC Real Time Clock.
14 - Michal Simek <michal.simek@amd.com>
17 - $ref: rtc.yaml#
21 const: xlnx,zynqmp-rtc
29 clock-names:
[all …]
Dmicrochip,pic32-rtc.txt1 * Microchip PIC32 Real Time Clock and Calendar
3 The RTCC keeps time in hours, minutes, and seconds, and one half second. It
8 - compatible: should be: "microchip,pic32mzda-rtc"
9 - reg: physical base address of the controller and length of memory mapped
11 - interrupts: RTC alarm/event interrupt
12 - clocks: clock phandle
17 compatible = "microchip,pic32mzda-rtc";
Drtc.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Real Time Clock Common Properties
10 - Alexandre Belloni <alexandre.belloni@bootlin.com>
14 describe Real Time Clock devices in a device tree.
18 pattern: "^rtc(@.*|-([0-9]|[1-9][0-9]+))?$"
20 aux-voltage-chargeable:
29 quartz-load-femtofarads:
31 The capacitive load of the quartz(x-tal), expressed in femto
[all …]
Dmaxim,mcp795.txt1 * Maxim MCP795 SPI Serial Real-Time Clock
4 - compatible: Should contain "maxim,mcp795".
5 - reg: SPI address for chip
Dcdns,rtc.txt1 Cadence Real Time Clock
3 The Cadence RTC controller with date, time and alarm capabilities.
4 The alarm may wake the system from low-power state.
7 - compatible: Should be "cdns,rtc-r109v3"
8 - reg: Specifies base physical address and size of the register area.
9 - interrupts: A single interrupt specifier.
10 - clocks: Must contain two entries:
11 - pclk: APB registers clock
12 - ref_clk: reference 1Hz or 100Hz clock, depending on IP configuration
13 See ../clocks/clock-bindings.txt for details.
[all …]
Dmaxim,ds1742.txt1 * Maxim (Dallas) DS1742/DS1743 Real Time Clock
4 - compatible: Should contain "maxim,ds1742".
5 - reg: Physical base address of the RTC and length of memory
Dnxp,rtc-2123.txt1 NXP PCF2123 SPI Real Time Clock
4 - compatible: should be: "nxp,pcf2123"
6 - reg: should be the SPI slave chipselect address
9 - spi-cs-high: PCF2123 needs chipselect high
16 spi-cs-high;
Dlpc32xx-rtc.txt1 * NXP LPC32xx SoC Real Time Clock controller
4 - compatible: must be "nxp,lpc3220-rtc"
5 - reg: physical base address of the controller and length of memory mapped
7 - interrupts: The RTC interrupt
12 compatible = "nxp,lpc3220-rtc";
Ddigicolor-rtc.txt1 Conexant Digicolor Real Time Clock controller
6 - compatible: should be "cnxt,cx92755-rtc"
7 - reg: physical base address of the controller and length of memory mapped
9 - interrupts: rtc alarm interrupt
14 compatible = "cnxt,cx92755-rtc";
Dorion-rtc.txt1 * Mvebu Real Time Clock
7 - compatible : Should be "marvell,orion-rtc"
8 - reg: physical base address of the controller and length of memory mapped
10 - interrupts: IRQ line for the RTC.
15 compatible = "marvell,orion-rtc";
/Documentation/scheduler/
Dsched-deadline.rst12 3. Scheduling Real-Time Tasks
18 4.1 System-wide settings
33 system behavior. As for -rt (group) scheduling, it is assumed that root users
50 ------------------
54 "runtime" microseconds of execution time every "period" microseconds, and
57 every time the task wakes up, the scheduler computes a "scheduling deadline"
61 task actually receives "runtime" time units within "deadline" if a proper
70 with the "traditional" real-time task model (see Section 3) can effectively
76 - Each SCHED_DEADLINE task is characterized by the "runtime",
79 - The state of the task is described by a "scheduling deadline", and
[all …]
Dsched-rt-group.rst2 Real-Time group scheduling
12 2.1 System-wide settings
28 resolution, or the time it takes to handle the budget refresh itself.
33 are real-time processes).
40 ---------------
43 the amount of bandwidth (eg. CPU time) being constant. In order to schedule
45 of the CPU time available. Without a minimum guarantee a realtime group can
50 ----------------
52 CPU time is divided by means of specifying how much time can be spent running
53 in a given period. We allocate this "run time" for each realtime group which
[all …]
/Documentation/mm/
Dactive_mm.rst6 (running tasks with ->active_mm == mm && ->mm == NULL) on kernels
13 List: linux-kernel
16 Date: 1999-07-30 21:36:24
18 Cc'd to linux-kernel, because I don't write explanations all that often,
25 > discussed on the mailing lists---I just returned from vacation and
26 > wasn't able to follow linux-kernel for a while).
30 - we have "real address spaces" and "anonymous address spaces". The
32 user-level page tables at all, so when we do a context switch into an
37 doesn't need any user mappings - all kernel threads basically fall into
38 this category, but even "real" threads can temporarily say that for
[all …]
/Documentation/ABI/testing/
Dsysfs-class-rtc-rtc0-device-rtc_calibration5 Description: Attribute for calibrating ST-Ericsson AB8500 Real Time Clock
7 calibrate the AB8500.s 32KHz Real Time Clock.
11 The range of the attribute is -127 to +127 in units of
12 30.5 micro-seconds (half-parts-per-million of the 32KHz clock)
13 Users: The /vendor/st-ericsson/base_utilities/core/rtc_calibration
/Documentation/driver-api/hte/
Dtegra-hte.rst1 .. SPDX-License-Identifier: GPL-2.0+
7 -----------
15 --------
17 This GTE instance timestamps GPIO in real time. For that to happen GPIO
19 instance supports timestamping GPIOs in real time as it is tightly coupled with
31 specified during IOCTL calls. Refer to ``tools/gpio/gpio-event-mon.c``, which
35 -----------------------------------------
37 This GTE instance timestamps LIC IRQ lines in real time. The hte devicetree
40 one-to-one mapping with IRQ GTE provider, consumers can simply specify the IRQ
45 ``drivers/hte/hte-tegra194.c``. The test driver
[all …]
/Documentation/arch/x86/
Dbuslock.rst1 .. SPDX-License-Identifier: GPL-2.0
10 :Authors: - Fenghua Yu <fenghua.yu@intel.com>
11 - Tony Luck <tony.luck@intel.com>
21 memory or any locked access to non-WB memory. This is typically thousands of
32 --------------------------------------
38 ------------------------------------
50 +------------------+----------------------------+-----------------------+
52 +------------------+----------------------------+-----------------------+
54 +------------------+----------------------------+-----------------------+
66 +------------------+----------------------------+-----------------------+
[all …]
/Documentation/sound/designs/
Dseq-oss.rst15 What this does - it provides the emulation of the OSS sequencer, access
53 However, each MIDI device is exclusive - that is, if a MIDI device
57 * Real-time event processing:
59 The events can be processed in real time without using out of bound
60 ioctl. To switch to real-time mode, send ABSTIME 0 event. The followed
61 events will be processed in real-time without queued. To switch off the
62 real-time mode, send RELTIME 0 event.
67 ``/proc/asound/seq/oss`` at any time. In the later version,
74 Run configure script with both sequencer support (``--with-sequencer=yes``)
75 and OSS emulation (``--with-oss=yes``) options. A module ``snd-seq-oss.o``
[all …]
/Documentation/tools/rtla/
Drtla.rst4 --------------------------------
5 Real-time Linux Analysis tool
6 --------------------------------
16 The **rtla** is a meta-tool that includes a set of commands that aims to
17 analyze the real-time properties of Linux. But instead of testing Linux
34 **-h**, **--help**
42 **rtla-osnoise**\(1), **rtla-timerlat**\(1)
/Documentation/timers/
Dno_hz.rst2 NO_HZ: Reducing Scheduling-Clock Ticks
7 reduce the number of scheduling-clock interrupts, thereby improving energy
9 some types of computationally intensive high-performance computing (HPC)
10 applications and for real-time applications.
12 There are three main ways of managing scheduling-clock interrupts
13 (also known as "scheduling-clock ticks" or simply "ticks"):
15 1. Never omit scheduling-clock ticks (CONFIG_HZ_PERIODIC=y or
16 CONFIG_NO_HZ=n for older kernels). You normally will -not-
19 2. Omit scheduling-clock ticks on idle CPUs (CONFIG_NO_HZ_IDLE=y or
23 3. Omit scheduling-clock ticks on CPUs that are either idle or that
[all …]
/Documentation/devicetree/bindings/power/reset/
Datmel,at91sam9260-shdwc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/power/reset/atmel,at91sam9260-shdwc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Claudiu Beznea <claudiu.beznea@microchip.com>
14 and VDDCORE and the wake-up detection on debounced input lines.
19 - atmel,at91sam9260-shdwc
20 - atmel,at91sam9rl-shdwc
21 - atmel,at91sam9x5-shdwc
29 atmel,wakeup-mode:
[all …]
Datmel,sama5d2-shdwc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/power/reset/atmel,sama5d2-shdwc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Claudiu Beznea <claudiu.beznea@microchip.com>
14 and VDDCORE and the wake-up detection on debounced input lines.
19 - items:
20 - const: microchip,sama7g5-shdwc
21 - const: syscon
22 - enum:
[all …]
/Documentation/admin-guide/
Drtc.rst2 Real Time Clock (RTC) Drivers for Linux
5 When Linux developers talk about a "Real Time Clock", they usually mean
6 something that tracks wall clock time and is battery backed so that it
8 the local time zone or daylight savings time -- unless they dual boot
9 with MS-Windows -- but will instead be set to Coordinated Universal Time
10 (UTC, formerly "Greenwich Mean Time").
12 The newest non-PC hardware tends to just count seconds, like the time(2)
13 system call reports, but RTCs also very commonly represent time using
14 the Gregorian calendar and 24 hour time, as reported by gmtime(3).
16 Linux has two largely-compatible userspace RTC API families you may
[all …]
/Documentation/devicetree/bindings/display/mediatek/
Dmediatek,dsc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chun-Kuang Hu <chunkuang.hu@kernel.org>
11 - Philipp Zabel <p.zabel@pengutronix.de>
17 video bit stream. DSC is designed for real-time systems with
18 real-time compression, transmission, decompression and Display.
23 - enum:
24 - mediatek,mt8195-disp-dsc
34 - description: DSC Wrapper Clock
[all …]

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