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/drivers/clk/qcom/
DMakefile90 obj-$(CONFIG_SDM_CAMCC_845) += camcc-sdm845.o
91 obj-$(CONFIG_SDM_DISPCC_845) += dispcc-sdm845.o
95 obj-$(CONFIG_SDM_GCC_845) += gcc-sdm845.o
96 obj-$(CONFIG_SDM_GPUCC_845) += gpucc-sdm845.o
97 obj-$(CONFIG_SDM_LPASSCC_845) += lpasscc-sdm845.o
98 obj-$(CONFIG_SDM_VIDEOCC_845) += videocc-sdm845.o
Dlpasscc-sdm845.c12 #include <dt-bindings/clock/qcom,lpass-sdm845.h>
135 { .compatible = "qcom,sdm845-lpasscc" },
143 .name = "sdm845-lpasscc",
160 MODULE_DESCRIPTION("QTI LPASS_CC SDM845 Driver");
DKconfig101 platforms such as SDM845.
613 tristate "SDM845 Camera Clock Controller"
617 Support for the camera clock controller on SDM845 devices.
672 tristate "SDM845/SDM670 Global Clock Controller"
676 Support for the global clock controller on SDM845 and SDM670 devices.
681 tristate "SDM845 Graphics Clock Controller"
685 Support for the graphics clock controller on SDM845 devices.
690 tristate "SDM845 Video Clock Controller"
695 Support for the video clock controller on SDM845 devices.
700 tristate "SDM845 Display Clock Controller"
[all …]
Dgpucc-sdm845.c11 #include <dt-bindings/clock/qcom,gpucc-sdm845.h>
170 { .compatible = "qcom,sdm845-gpucc" },
201 .name = "sdm845-gpucc",
219 MODULE_DESCRIPTION("QTI GPUCC SDM845 Driver");
Dvideocc-sdm845.c11 #include <dt-bindings/clock/qcom,videocc-sdm845.h>
317 { .compatible = "qcom,sdm845-videocc" },
338 .name = "sdm845-videocc",
Ddispcc-sdm845.c13 #include <dt-bindings/clock/qcom,dispcc-sdm845.h>
845 { .compatible = "qcom,sdm845-dispcc" },
873 .name = "disp_cc-sdm845",
892 MODULE_DESCRIPTION("QTI DISPCC SDM845 Driver");
/drivers/interconnect/qcom/
DMakefile23 qnoc-sdm845-objs := sdm845.o
51 obj-$(CONFIG_INTERCONNECT_QCOM_SDM845) += qnoc-sdm845.o
Dsdm845.c13 #include <dt-bindings/interconnect/qcom,sdm845.h>
17 #include "sdm845.h"
1783 { .compatible = "qcom,sdm845-aggre1-noc",
1785 { .compatible = "qcom,sdm845-aggre2-noc",
1787 { .compatible = "qcom,sdm845-config-noc",
1789 { .compatible = "qcom,sdm845-dc-noc",
1791 { .compatible = "qcom,sdm845-gladiator-noc",
1793 { .compatible = "qcom,sdm845-mem-noc",
1795 { .compatible = "qcom,sdm845-mmss-noc",
1797 { .compatible = "qcom,sdm845-system-noc",
[all …]
DKconfig159 tristate "Qualcomm SDM845 interconnect driver"
164 This is a driver for the Qualcomm Network-on-Chip on sdm845-based
/drivers/iommu/arm/arm-smmu/
Darm-smmu-qcom.c256 { .compatible = "qcom,sdm845-mdss" },
257 { .compatible = "qcom,sdm845-mss-pil" },
388 * such as USB and UFS, turn off wait-for-safe on sdm845 based boards, in qcom_sdm845_smmu500_reset()
502 * No need for adreno impl here. On sdm845 the Adreno SMMU is handled
503 * by the separate sdm845-smmu-v2 device.
529 { .compatible = "qcom,sdm845-smmu-v2", .data = &qcom_smmu_v2_data },
530 { .compatible = "qcom,sdm845-smmu-500", .data = &sdm845_smmu_500_data },
/drivers/gpu/drm/msm/
DKconfig87 using e.g. SDM845 and newer platforms.
139 bool "Enable DSI 10nm PHY driver in MSM DRM (used by SDM845)"
143 Choose this option if DSI PHY on SDM845 is used on the platform.
/drivers/reset/
Dreset-qcom-aoss.c12 #include <dt-bindings/reset/qcom,sdm845-aoss.h>
118 { .compatible = "qcom,sdm845-aoss-cc", .data = &sdm845_aoss_desc },
Dreset-qcom-pdc.c12 #include <dt-bindings/reset/qcom,sdm845-pdc.h>
149 { .compatible = "qcom,sdm845-pdc-global", .data = &sdm845_pdc_reset_desc },
DKconfig172 for Qualcomm SDM845 SoCs. Say Y if you want to control
181 for Qualcomm Technologies Inc SDM845 SoCs. Say Y if you want
/drivers/thermal/qcom/
Dlmh.c134 * Only sdm845 has lmh hardware currently enabled from hlos. If this is needed in lmh_probe()
227 { .compatible = "qcom,sdm845-lmh", .data = (void *)LMH_ENABLE_ALGOS},
DKconfig43 However, on certain SoCs like sdm845 LMh has to be configured from kernel.
Dtsens-v2.c29 /* v2.x: 8996, 8998, sdm845 */
/drivers/soc/qcom/
DKconfig70 SDM845. This provides interfaces to clients that use the LLCC.
285 on SDM845 to measure bandwidth between CPU (gladiator_noc) and Last
Dicc-bwmon.c46 * Starting with SDM845, the BWMON4 register space has changed a bit:
852 { .compatible = "qcom,sdm845-bwmon", .data = &sdm845_cpu_bwmon_data },
854 { .compatible = "qcom,sdm845-llcc-bwmon", .data = &sdm845_llcc_bwmon_data },
/drivers/gpu/drm/ci/
Dtest.yml131 msm:sdm845:
139 GPU_VERSION: sdm845
/drivers/pinctrl/qcom/
DKconfig.msm257 tristate "Qualcomm Technologies Inc SDM845 pin controller driver"
263 Technologies Inc SDM845 platform.
DMakefile42 obj-$(CONFIG_PINCTRL_SDM845) += pinctrl-sdm845.o
/drivers/remoteproc/
Dqcom_q6v5_adsp.c3 * Qualcomm Technology Inc. ADSP Peripheral Image Loader for SDM845.
851 { .compatible = "qcom,sdm845-adsp-pil", .data = &adsp_resource_init },
866 MODULE_DESCRIPTION("QTI SDM845 ADSP Peripheral Image Loader");
/drivers/net/wwan/
DKconfig88 newer Qualcomm SoCs (e.g. SDM845) still provide an AT port through
/drivers/regulator/
Dqcom-refgen-regulator.c139 { .compatible = "qcom,sdm845-refgen-regulator", .data = &sdm845_refgen_desc },

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