Searched full:secondary (Results 1 – 25 of 136) sorted by relevance
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/Documentation/admin-guide/blockdev/drbd/ |
D | peer-states-8.dot | 2 Secondary -> Primary [ label = "recv state packet" ] 3 Primary -> Secondary [ label = "recv state packet" ] 5 Secondary -> Unknown [ label = "connection lost" ] 7 Unknown -> Secondary [ label = "connected" ]
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/Documentation/devicetree/bindings/powerpc/fsl/ |
D | pamu.txt | 63 - fsl,secondary-cache-geometry 65 Two cells that specify the geometry of the secondary PAMU 108 fsl,secondary-cache-geometry = <128 2>; 114 fsl,secondary-cache-geometry = <128 2>; 120 fsl,secondary-cache-geometry = <128 2>; 126 fsl,secondary-cache-geometry = <128 2>; 132 fsl,secondary-cache-geometry = <128 2>;
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/Documentation/devicetree/bindings/interrupt-controller/ |
D | snps,dw-apb-ictl.txt | 4 dw_apb_ictl. The IP is used as secondary interrupt controller in some SoCs with 15 Additional required property when it's used as secondary interrupt controller: 27 /* dw_apb_ictl is used as secondary interrupt controller */
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/Documentation/devicetree/bindings/net/can/ |
D | st,stm32-bxcan.yaml | 32 st,can-secondary: 34 Secondary mode of the bxCAN peripheral is only relevant if the chip 39 uses the terms slave instead of secondary. 70 secondary) in dual CAN peripheral configuration.
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/Documentation/arch/arm/samsung/ |
D | bootloader-interface.rst | 28 0x1c exynos4_secondary_startup Secondary CPU boot 29 0x1c + 4*cpu exynos4_secondary_startup (Exynos4412) Secondary CPU boot 44 0x00 exynos4_secondary_startup Secondary CPU boot 45 0x04 exynos4_secondary_startup (Exynos542x) Secondary CPU boot 46 4*cpu exynos4_secondary_startup (Exynos4412) Secondary CPU boot 60 0x0814 exynos4_secondary_startup (Exynos4210 r1.1) Secondary CPU boot 72 0x0908 Non-zero Secondary CPU boot up indicator
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/Documentation/devicetree/bindings/sound/ |
D | samsung-i2s.yaml | 22 secondary FIFO, s/w reset control and internal mux for root clock 26 playback, stereo channel capture, secondary FIFO using internal 33 Exynos7 I2S has 7.1 channel TDM support for capture, secondary FIFO 42 capture, secondary FIFO using external DMA, s/w reset control, 119 subsystem (used in secondary sound source).
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D | ti,tlv320adc3xxx.yaml | 55 - 6 # ADC3XXX_GPIO_SECONDARY_BCLK - Codec interface secondary BCLK 56 - 7 # ADC3XXX_GPIO_SECONDARY_WCLK - Codec interface secondary WCLK 73 - 6 # ADC3XXX_GPIO_SECONDARY_BCLK - Codec interface secondary BCLK 74 - 7 # ADC3XXX_GPIO_SECONDARY_WCLK - Codec interface secondary WCLK
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/Documentation/arch/sparc/oradax/ |
D | dax-hv-api.txt | 172 [7:5] Secondary source address type 248 encoded data) and secondary data streams (meta-data for the encoded data). 260 … Variable width byte packed Data stream of lengths must be provided as a secondary 263 length encoding provided as a secondary input 267 as a secondary input 279 … a secondary input; pointer to the encoding table must be 291 … OZIP (CCB version 1) encoding as a secondary input; pointer to the encoding table must 296 … OZIP (CCB version 1) encoding stream of run lengths must be provided as a secondary 307 36.2.1.1.3. Secondary Input Format 309 …For primary input data streams which require a secondary input stream, the secondary input stream … [all …]
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/Documentation/devicetree/bindings/display/panel/ |
D | sharp,lq101r1sx01.yaml | 47 phandle to the DSI peripheral on the secondary link. Note that the 74 link2 = <&secondary>; 86 secondary: panel@0 {
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/Documentation/devicetree/bindings/arm/bcm/ |
D | brcm,bcm63138.txt | 11 An optional Boot lookup table Device Tree node is required for secondary CPU 13 defined in reset/brcm,bcm63138-pmb.txt for this secondary CPU, and an 23 Optional properties for the secondary CPU node:
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/Documentation/devicetree/bindings/soc/fsl/ |
D | fsl,layerscape-dcfg.yaml | 15 configuration and status for the device. Such as setting the secondary 16 core start address and release the secondary core from holdoff and
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/Documentation/devicetree/bindings/arm/cpu-enable-method/ |
D | marvell,berlin-smp | 2 Secondary CPU enable-method "marvell,berlin-smp" binding 5 This document describes the "marvell,berlin-smp" method for enabling secondary
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D | al,alpine-smp | 2 Secondary CPU enable-method "al,alpine-smp" binding 6 enabling secondary CPUs. To apply to all CPUs, a single
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/Documentation/devicetree/bindings/clock/ |
D | qcom,gcc-sc8280xp.yaml | 40 - description: Secondary USB SuperSpeed pipe clock 46 - description: Secondary USB4 RX0 clock 47 - description: Secondary USB4 RX1 clock
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D | qcom,krait-cc.txt | 20 Definition: reference to the clock parents of hfpll, secondary muxes.
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/Documentation/devicetree/bindings/display/tegra/ |
D | nvidia,tegra20-gr3d.yaml | 114 - description: secondary module clock 124 - description: secondary module reset 126 - description: secondary memory client hotflush reset
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/Documentation/hwmon/ |
D | ibm-cffps.rst | 53 temp2_alarm Secondary rectifier temp over-temperature alarm. 54 temp2_input Measured secondary rectifier temp in millidegrees C.
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D | nct6775.rst | 172 Secondary temperature source. Value is temperature 174 Set to 0 to disable secondary temperature control. 176 If secondary temperature functionality is enabled, it is controlled with the 188 Temperature at which secondary temperature control kicks
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/Documentation/userspace-api/media/v4l/ |
D | vidioc-g-tuner.rst | 131 - receiving stereo audio and a secondary audio program 252 carrier and a secondary language monaural on a second carrier. 256 - Reception of the secondary language of a bilingual audio program 261 - Reception of a secondary audio program is supported. This is a 265 carrier for a monaural secondary language. Only 321 - The tuner receives the secondary language of a bilingual audio 368 - Play the secondary language, mono. When the tuner receives no 383 - Play the primary language on the left channel, the secondary
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/Documentation/fb/ |
D | viafb.rst | 96 viafb_mode1: (secondary display device) 102 viafb_bpp1: (secondary display device) 105 viafb_refresh1: (secondary display device) 113 secondary device. 135 If CRT is primary and DVI is secondary, we should use:: 139 If DVI is primary and CRT is secondary, we should use::
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D | matroxfb.rst | 231 with secondary (TV) output - if DFP is active, TV output must be 245 secondary analog output and third letter to the DVI output. 407 + secondary head shares videomemory with primary head. It is not problem 411 + due to hardware limitation, secondary head can use only 16 and 32bpp 413 + secondary head is not accelerated. There were bad problems with accelerated 414 XFree when secondary head used to use acceleration. 415 + secondary head always powerups in 640x480@60-32 videomode. You have to use 417 + secondary head always powerups in monitor mode. You have to use fbmatroxset 428 + secondary head shares videomemory with primary head. It is not problem 431 + due to hardware limitation, secondary head can use only 16 and 32bpp [all …]
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/Documentation/arch/s390/ |
D | qeth.rst | 12 a primary or a secondary Bridge Port. For more information, see 24 ROLE={primary|secondary|none}
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/Documentation/PCI/endpoint/ |
D | pci-ntb-howto.rst | 67 progif_code secondary subsys_id vendorid 112 connected to the two hosts. Use the 'primary' and 'secondary' entries 114 primary interface and the other PCI endpoint controller to the secondary 118 # ln -s controllers/2910000.pcie-ep/ functions/pci-epf-ntb/func1/secondary
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D | pci-endpoint-cfs.rst | 75 ... secondary/ 81 controller connected to secondary interface should be added in 'secondary'
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/Documentation/arch/x86/ |
D | entry_64.rst | 60 So when we have a secondary entry, already in kernel mode, we *must 64 Now, there's a secondary complication: there's a cheap way to test 89 whether SWAPGS was already done: if we see that we are a secondary
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