Searched full:settings (Results 1 – 25 of 414) sorted by relevance
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| /Documentation/devicetree/bindings/soc/xilinx/ |
| D | xlnx,vcu-settings.yaml | 4 $id: http://devicetree.org/schemas/soc/xilinx/xlnx,vcu-settings.yaml#
7 title: Xilinx VCU Settings
13 The Xilinx VCU Settings provides information about the configuration of the
19 - const: xlnx,vcu-settings
38 compatible = "xlnx,vcu-settings", "syscon";
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| /Documentation/ABI/stable/ |
| D | sysfs-fs-orangefs | 5 Counters and settings for various caches.
66 Attribute cache configurable settings.
73 Name cache configurable settings.
80 Capability cache configurable settings.
87 Credential cache configurable settings.
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| D | sysfs-hypervisor-xen | 7 Might return "<denied>" in case of special security settings
16 Might return "<denied>" in case of special security settings
25 Might return "<denied>" in case of special security settings
56 Might return "<denied>" in case of special security settings
73 Might return "0" in case of special security settings
105 Might return "<denied>" in case of special security settings
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| /Documentation/ABI/obsolete/ |
| D | sysfs-driver-hid-roccat-pyra | 28 Please use binary attribute "settings" which provides this information.
55 press of a button. A profile is split in settings and buttons.
70 press of a button. A profile is split in settings and buttons.
82 press of a button. A profile is split in settings and buttons.
86 settings back to the mouse. The data has to be 13 bytes long.
98 press of a button. A profile is split in settings and buttons.
101 When read, these files return the respective profile settings.
107 …onfig num>.<interface num>/<hid-bus>:<vendor-id>:<product-id>.<num>/pyra/roccatpyra<minor>/settings
110 Description: When read, this file returns the settings stored in the mouse.
113 When written, this file lets write settings back to the mouse.
[all …]
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| D | sysfs-driver-hid-roccat-savu | 5 press of a button. A profile is split into general settings and
6 button settings. The buttons variable holds information about
29 press of a button. A profile is split into general settings and
30 button settings. A profile holds information like resolution,
33 settings back to the mouse. The data has to be 43 bytes long.
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| D | sysfs-driver-hid-roccat-kovaplus | 66 press of a button. A profile is split in settings and buttons.
81 press of a button. A profile is split in settings and buttons.
93 press of a button. A profile is split in settings and buttons.
97 settings back to the mouse. The data has to be 16 bytes long.
109 press of a button. A profile is split in settings and buttons.
112 When read, these files return the respective profile settings.
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| D | sysfs-driver-hid-roccat-koneplus | 59 press of a button. A profile is split in settings and buttons.
74 press of a button. A profile is split in settings and buttons.
86 press of a button. A profile is split in settings and buttons.
90 settings back to the mouse. The data has to be 43 bytes long.
102 press of a button. A profile is split in settings and buttons.
105 When read, these files return the respective profile settings.
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| /Documentation/misc-devices/ |
| D | ad525x_dpot.rst | 8 work with the immediate resistance settings as well as update the saved startup
9 settings. Access to the factory programmed tolerance is also provided, but
10 interpretation of this settings is required by the end application according to
23 The tolerance files are the read-only factory programmed tolerance settings
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| /Documentation/devicetree/bindings/clock/ |
| D | renesas,5p35023.yaml | 21 settings through the I2C interface when I2C mode is selected.
26 must be done via the full register map, including optimized settings.
48 renesas,settings:
50 Optimized settings for the device must be provided in full
76 renesas,settings = [
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| /Documentation/devicetree/bindings/soc/renesas/ |
| D | renesas,r9a09g011-sys.yaml | 15 - Bank address settings for DMAC
16 - Bank address settings of the units for ICB
21 - PCIe related settings
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| /Documentation/devicetree/bindings/pinctrl/ |
| D | fsl,imx-pinctrl.txt | 7 different PAD settings (like pull up, keeper, etc) the IOMUXC controls
8 also the PAD settings parameters.
17 mode) this pin can work on and the 'config' configures various pad settings
72 /* shared pinctrl settings */
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| D | atmel,at91-pinctrl.txt | 7 different PAD settings (like pull up, keeper, etc) the controller controls
8 also the PAD settings parameters.
17 mode) this pin can work on and the 'config' configures various pad settings
160 /* shared pinctrl settings */
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| /Documentation/devicetree/bindings/mtd/ |
| D | ibm,ndfc.txt | 9 - bank-settings : NDFC bank configuration register value (default 0).
20 bank-settings = <0x80002222>;
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| /Documentation/devicetree/bindings/sound/ |
| D | audio-graph-card.yaml | 36 * dai-controller own settings
49 * codec own settings
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| /Documentation/networking/ |
| D | sfp-phylink.rst | 21 settings.
25 In PHY mode, we use phylib to read the current link settings from
51 exactly the settings given to it in its :c:func:`mac_config` function.
82 link-up part now includes configuring the MAC for the link settings.
184 just like the speed, duplex etc. settings.
209 from the MAC, and report back the settings that the MAC is currently
216 (speed, duplex and flow control/pause enablement settings) which
218 tightly integrated, or when the settings are not coming from in-band
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| /Documentation/admin-guide/mm/ |
| D | index.rst | 12 settings. Most of these settings are available via ``/proc``
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| /Documentation/devicetree/bindings/opp/ |
| D | ti,omap-opp-supply.yaml | 52 ti,efuse-settings:
81 - ti,efuse-settings
95 ti,efuse-settings =
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| /Documentation/devicetree/bindings/net/wireless/ |
| D | mediatek,mt76.yaml | 187 rates for multiple channel bandwidth settings.
189 settings for which the rate set applies, followed by
191 channel bandwidth settings is 20, 40, 80 and 160 MHz.
201 for multiple channel bandwidth or resource unit settings.
203 resource unit settings for which the rate set applies,
205 channel resource unit settings is RU26, RU52, RU106,
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| /Documentation/usb/ |
| D | iuu_phoenix.rst | 50 - clockmode will provide 3 different base settings commonly adopted by
81 Don't worry about the serial settings, the serial emulation
84 use this settings to deduce de boost but is that feature
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| /Documentation/scheduler/ |
| D | sched-rt-group.rst | 12 2.1 System-wide settings
21 Fiddling with these settings can result in an unstable system, the knobs are
84 2.1 System wide settings
87 The system wide settings are configured under the /proc virtual file system:
138 Group settings are checked against the following limits in order to keep the
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| /Documentation/devicetree/bindings/mfd/ |
| D | da9062.txt | 35 modified to match the chip's OTP settings).
54 - regulators : This node defines the settings for the LDOs and BUCKs.
83 - rtc : This node defines settings required for the Real-Time Clock associated
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| /Documentation/sphinx/ |
| D | kernel_include.py | 62 env = self.state.document.settings.env
87 if not self.state.document.settings.file_insertion_enabled:
101 'encoding', self.state.document.settings.input_encoding)
102 e_handler=self.state.document.settings.input_encoding_error_handler
104 'tab-width', self.state.document.settings.tab_width)
106 self.state.document.settings.record_dependencies.add(path)
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| D | kernel_abi.py | 75 if not doc.settings.file_insertion_enabled:
95 env = self.state.document.settings.env
132 kernellog.info(self.state.document.settings.env.app, "%s: parsed %i lines" % (fname, n))
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| D | kernel_feat.py | 74 self.state.document.settings.env.app.warn(message, prefix="")
78 if not doc.settings.file_insertion_enabled:
81 env = doc.settings.env
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| /Documentation/arch/arm/pxa/ |
| D | mfp.rst | 14 Unlike the GPIO alternate function settings on PXA25x and PXA27x, a new MFP
89 same name, different meaning and settings on different processors). E.g.
196 the actual API invoked to convert these definitions into register settings and
277 Register Settings
280 Register settings on PXA3xx for a pin configuration is actually very
283 ones and the low power mode ones, to allow different settings.
286 settings on PXA2xx is a bit complicated: many registers are involved,
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