| /Documentation/devicetree/bindings/soc/starfive/ |
| D | starfive,jh7110-syscon.yaml | 4 $id: http://devicetree.org/schemas/soc/starfive/starfive,jh7110-syscon.yaml#
20 - const: starfive,jh7110-sys-syscon
21 - const: syscon
25 - starfive,jh7110-aon-syscon
26 - starfive,jh7110-stg-syscon
27 - const: syscon
48 const: starfive,jh7110-sys-syscon
59 const: starfive,jh7110-aon-syscon
71 syscon@10240000 {
72 compatible = "starfive,jh7110-stg-syscon", "syscon";
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| /Documentation/devicetree/bindings/mfd/ |
| D | atmel-matrix.txt | 8 "atmel,at91sam9260-matrix", "syscon"
9 "atmel,at91sam9261-matrix", "syscon"
10 "atmel,at91sam9263-matrix", "syscon"
11 "atmel,at91sam9rl-matrix", "syscon"
12 "atmel,at91sam9g45-matrix", "syscon"
13 "atmel,at91sam9n12-matrix", "syscon"
14 "atmel,at91sam9x5-matrix", "syscon"
15 "atmel,sama5d3-matrix", "syscon"
16 "microchip,sam9x60-matrix", "syscon"
17 "microchip,sam9x7-matrix", "atmel,at91sam9x5-matrix", "syscon"
[all …]
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| D | syscon.yaml | 4 $id: http://devicetree.org/schemas/mfd/syscon.yaml#
14 a reference to the syscon node (e.g. by phandle, node path, or
27 - syscon
41 - amd,pensando-elba-syscon
51 - intel,lgm-syscon
56 - microchip,lan966x-cpu-syscon
57 - microchip,sparx5-cpu-syscon
73 - const: syscon
76 const: syscon
117 syscon: syscon@1c00000 {
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| D | atmel-smc.txt | 9 "atmel,at91sam9260-smc", "syscon"
10 "atmel,sama5d3-smc", "syscon"
11 "atmel,sama5d2-smc", "syscon"
12 "microchip,sam9x60-smc", "syscon"
13 "microchip,sam9x7-smc", "atmel,at91sam9260-smc", "syscon"
20 compatible = "atmel,sama5d3-smc", "syscon";
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| /Documentation/devicetree/bindings/power/reset/ |
| D | axxia-reset.txt | 3 This driver can do reset of the Axxia SoC. It uses the registers in the syscon
8 -syscon: phandle to the syscon node.
12 syscon: syscon@2010030000 {
13 compatible = "lsi,axxia-syscon", "syscon";
19 syscon = <&syscon>;
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| D | syscon-reboot.yaml | 4 $id: http://devicetree.org/schemas/power/reset/syscon-reboot.yaml#
7 title: Generic SYSCON mapped register reset driver
13 This is a generic reset driver using syscon to map the reset register.
15 defined by the SYSCON register map base plus the offset with the value and
17 access only. The SYSCON registers map is normally retrieved from the
18 parental dt-node. So the SYSCON reboot node should be represented as a
19 sub-node of a "syscon", "simple-mfd" node. Though the regmap property
24 const: syscon-reboot
39 the syscon-reboot node been a child of a system controller node.
67 compatible = "syscon-reboot";
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| D | keystone-reset.txt | 16 - ti,syscon-pll: phandle/offset pair. The phandle to syscon used to
20 - ti,syscon-dev: phandle/offset pair. The phandle to syscon used to
41 compatible = "ti,keystone-pllctrl", "syscon";
46 compatible = "ti,keystone-devctrl", "syscon";
52 ti,syscon-pll = <&pllctrl 0xe4>;
53 ti,syscon-dev = <&devctrl 0x328>;
63 ti,syscon-pll = <&pllctrl 0xe4>;
64 ti,syscon-dev = <&devctrl 0x328>;
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| D | syscon-reboot-mode.yaml | 4 $id: http://devicetree.org/schemas/power/reset/syscon-reboot-mode.yaml#
7 title: Generic SYSCON reboot mode driver
14 and stores it in a SYSCON mapped register. Then the bootloader
16 value stored. The SYSCON mapped register is retrieved from the
17 parental dt-node plus the offset. So the SYSCON reboot-mode node
18 should be represented as a sub-node of a "syscon", "simple-mfd" node.
22 const: syscon-reboot-mode
48 compatible = "syscon-reboot-mode";
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| /Documentation/devicetree/bindings/arm/mediatek/ |
| D | mediatek,ipu.txt | 9 - "mediatek,mt8183-ipu_conn", "syscon"
10 - "mediatek,mt8183-ipu_adl", "syscon"
11 - "mediatek,mt8183-ipu_core0", "syscon"
12 - "mediatek,mt8183-ipu_core1", "syscon"
21 ipu_conn: syscon@19000000 {
22 compatible = "mediatek,mt8183-ipu_conn", "syscon";
27 ipu_adl: syscon@19010000 {
28 compatible = "mediatek,mt8183-ipu_adl", "syscon";
33 ipu_core0: syscon@19180000 {
34 compatible = "mediatek,mt8183-ipu_core0", "syscon";
[all …]
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| D | mediatek,imgsys.txt | 9 - "mediatek,mt2701-imgsys", "syscon"
10 - "mediatek,mt2712-imgsys", "syscon"
11 - "mediatek,mt6765-imgsys", "syscon"
12 - "mediatek,mt6779-imgsys", "syscon"
13 - "mediatek,mt6797-imgsys", "syscon"
14 - "mediatek,mt7623-imgsys", "mediatek,mt2701-imgsys", "syscon"
15 - "mediatek,mt8167-imgsys", "syscon"
16 - "mediatek,mt8173-imgsys", "syscon"
17 - "mediatek,mt8183-imgsys", "syscon"
27 compatible = "mediatek,mt8173-imgsys", "syscon";
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| D | mediatek,vdecsys.txt | 9 - "mediatek,mt2701-vdecsys", "syscon"
10 - "mediatek,mt2712-vdecsys", "syscon"
11 - "mediatek,mt6779-vdecsys", "syscon"
12 - "mediatek,mt6797-vdecsys", "syscon"
13 - "mediatek,mt7623-vdecsys", "mediatek,mt2701-vdecsys", "syscon"
14 - "mediatek,mt8167-vdecsys", "syscon"
15 - "mediatek,mt8173-vdecsys", "syscon"
16 - "mediatek,mt8183-vdecsys", "syscon"
26 compatible = "mediatek,mt8173-vdecsys", "syscon";
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| D | mediatek,audsys.txt | 9 - "mediatek,mt2701-audsys", "syscon"
10 - "mediatek,mt6765-audsys", "syscon"
11 - "mediatek,mt6779-audio", "syscon"
12 - "mediatek,mt7622-audsys", "syscon"
13 - "mediatek,mt7623-audsys", "mediatek,mt2701-audsys", "syscon"
14 - "mediatek,mt8167-audiosys", "syscon"
15 - "mediatek,mt8183-audiosys", "syscon"
16 - "mediatek,mt8192-audsys", "syscon"
17 - "mediatek,mt8516-audsys", "syscon"
32 compatible = "mediatek,mt7622-audsys", "syscon";
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| D | mediatek,mt8192-sys-clock.yaml | 24 - const: syscon
43 topckgen: syscon@10000000 {
44 compatible = "mediatek,mt8192-topckgen", "syscon";
50 infracfg: syscon@10001000 {
51 compatible = "mediatek,mt8192-infracfg", "syscon";
57 pericfg: syscon@10003000 {
58 compatible = "mediatek,mt8192-pericfg", "syscon";
64 apmixedsys: syscon@1000c000 {
65 compatible = "mediatek,mt8192-apmixedsys", "syscon";
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| D | mediatek,mt8195-sys-clock.yaml | 32 - const: syscon
51 topckgen: syscon@10000000 {
52 compatible = "mediatek,mt8195-topckgen", "syscon";
58 infracfg_ao: syscon@10001000 {
59 compatible = "mediatek,mt8195-infracfg_ao", "syscon";
65 apmixedsys: syscon@1000c000 {
66 compatible = "mediatek,mt8195-apmixedsys", "syscon";
72 pericfg_ao: syscon@11003000 {
73 compatible = "mediatek,mt8195-pericfg_ao", "syscon";
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| D | mediatek,ethsys.txt | 9 - "mediatek,mt2701-ethsys", "syscon"
10 - "mediatek,mt7622-ethsys", "syscon"
11 - "mediatek,mt7623-ethsys", "mediatek,mt2701-ethsys", "syscon"
12 - "mediatek,mt7629-ethsys", "syscon"
13 - "mediatek,mt7981-ethsys", "syscon"
14 - "mediatek,mt7986-ethsys", "syscon"
25 compatible = "mediatek,mt2701-ethsys", "syscon";
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| D | mediatek,mfgcfg.txt | 9 - "mediatek,mt2712-mfgcfg", "syscon"
10 - "mediatek,mt6779-mfgcfg", "syscon"
11 - "mediatek,mt8167-mfgcfg", "syscon"
12 - "mediatek,mt8183-mfgcfg", "syscon"
21 mfgcfg: syscon@13000000 {
22 compatible = "mediatek,mt2712-mfgcfg", "syscon";
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| D | mediatek,vencsys.txt | 9 - "mediatek,mt2712-vencsys", "syscon"
10 - "mediatek,mt6779-vencsys", "syscon"
11 - "mediatek,mt6797-vencsys", "syscon"
12 - "mediatek,mt8173-vencsys", "syscon"
13 - "mediatek,mt8183-vencsys", "syscon"
23 compatible = "mediatek,mt8173-vencsys", "syscon";
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| /Documentation/devicetree/bindings/watchdog/ |
| D | ts4800-wdt.txt | 5 - syscon: phandle / integer array that points to the syscon node which
6 describes the FPGA's syscon registers.
7 - phandle to FPGA's syscon
15 syscon: syscon@b0010000 {
16 compatible = "syscon", "simple-mfd";
22 syscon = <&syscon 0xe>;
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| /Documentation/devicetree/bindings/arm/ |
| D | arm,realview.yaml | 74 "^.*syscon@[0-9a-f]+$":
76 description: All RealView boards must provide a syscon system controller
82 - const: arm,realview-eb11mp-revb-syscon
83 - const: arm,realview-eb-syscon
84 - const: syscon
87 - const: arm,realview-eb11mp-revc-syscon
88 - const: arm,realview-eb-syscon
89 - const: syscon
92 - const: arm,realview-eb-syscon
93 - const: syscon
[all …]
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| /Documentation/devicetree/bindings/phy/ |
| D | hisilicon,hi3670-usb3.yaml | 22 hisilicon,pericrg-syscon:
24 description: phandle of syscon used to control iso refclk.
26 hisilicon,pctrl-syscon:
28 description: phandle of syscon used to control usb tcxo.
30 hisilicon,sctrl-syscon:
32 description: phandle of syscon used to control phy deep sleep.
45 - hisilicon,pericrg-syscon
46 - hisilicon,pctrl-syscon
47 - hisilicon,sctrl-syscon
59 hisilicon,pericrg-syscon = <&crg_ctrl>;
[all …]
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| D | hisilicon,hi3660-usb3.yaml | 21 hisilicon,pericrg-syscon:
23 description: phandle of syscon used to control iso refclk.
25 hisilicon,pctrl-syscon:
27 description: phandle of syscon used to control usb tcxo.
36 - hisilicon,pericrg-syscon
37 - hisilicon,pctrl-syscon
48 hisilicon,pericrg-syscon = <&crg_ctrl>;
49 hisilicon,pctrl-syscon = <&pctrl>;
|
| /Documentation/devicetree/bindings/mips/ |
| D | mscc.txt | 19 - compatible: Should be "mscc,ocelot-chip-regs", "simple-mfd", "syscon"
23 syscon@71070000 {
24 compatible = "mscc,ocelot-chip-regs", "simple-mfd", "syscon";
36 - compatible: Should be "mscc,ocelot-cpu-syscon", "syscon"
40 syscon@70000000 {
41 compatible = "mscc,ocelot-cpu-syscon", "syscon";
52 - compatible: Should be "mscc,ocelot-hsio", "syscon", "simple-mfd"
56 syscon@10d0000 {
57 compatible = "mscc,ocelot-hsio", "syscon", "simple-mfd";
|
| /Documentation/devicetree/bindings/reset/ |
| D | ti-syscon-reset.txt | 1 TI SysCon Reset Controller
8 functionalities. This register range is best represented as a syscon node to
12 A SysCon Reset Controller node defines a device that uses a syscon node
16 SysCon Reset Controller Node
18 Each of the reset provider/controller nodes should be a child of a syscon
27 "ti,syscon-reset"
34 register from the syscon register base
38 register from the syscon register base
42 from the syscon register base
47 file <dt-bindings/reset/ti-syscon.h>
[all …]
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| /Documentation/devicetree/bindings/soc/loongson/ |
| D | loongson,ls2k-pmc.yaml | 17 - const: syscon
23 - const: syscon
40 syscon-poweroff:
41 $ref: /schemas/power/reset/syscon-poweroff.yaml#
46 syscon-reboot:
47 $ref: /schemas/power/reset/syscon-reboot.yaml#
64 compatible = "loongson,ls2k1000-pmc", "loongson,ls2k0500-pmc", "syscon";
70 syscon-reboot {
71 compatible = "syscon-reboot";
76 syscon-poweroff {
[all …]
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| /Documentation/devicetree/bindings/pci/ |
| D | ti,am65-pci-host.yaml | 38 ti,syscon-pcie-id:
42 - description: Phandle to the SYSCON entry
43 - description: pcie_device_id register offset within SYSCON
44 description: Phandle to the SYSCON entry required for getting PCIe device/vendor ID
46 ti,syscon-pcie-mode:
50 - description: Phandle to the SYSCON entry
51 - description: pcie_ctrl register offset within SYSCON
52 description: Phandle to the SYSCON entry required for configuring PCIe in RC or EP mode.
63 - ti,syscon-pcie-id
64 - ti,syscon-pcie-mode
[all …]
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