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/Documentation/driver-api/md/
Draid5-cache.rst7 caches data to the RAID disks. The cache can be in write-through (supported
11 in write-through mode. A user can switch it to write-back mode by::
15 And switch it back to write-through mode by::
17 echo "write-through" > /sys/block/md0/md/journal_mode
22 write-through mode
34 The write-through cache will cache all data on cache disk first. After the data
39 In write-through mode, MD reports IO completion to upper layer (usually
44 In write-through mode, the cache disk isn't required to be big. Several
80 The write-through and write-back cache use the same disk format. The cache disk
91 write-through mode, MD calculates parity for IO data, writes both IO data and
/Documentation/devicetree/bindings/interrupt-controller/
Dti,pruss-intc.yaml15 which are then mapped to 10 possible output interrupts through two levels
19 remaining 8 (2 through 9) connected to external interrupt controllers
23 differences on the output interrupts 2 through 9. If this property is not
24 defined, it implies that all the PRUSS INTC output interrupts 2 through 9
25 (host_intr0 through host_intr7) are connected exclusively to the Arm interrupt
30 through 19) are connected to new sub-modules within the ICSSG instances.
81 interrupts through 2 levels of many-to-one mapping i.e. events to channel
82 mapping and channels to host interrupts so through this property entire
89 output interrupts 2 through 9) that are not connected to the Arm interrupt
/Documentation/devicetree/bindings/soc/fsl/cpm_qe/qe/
Dusb.txt11 "brg1" through "brg16": clock source is BRG1-BRG16, respectively
12 "clk1" through "clk24": clock source is CLK1-CLK24, respectively
15 "brg1" through "brg16": clock source is BRG1-BRG16, respectively
16 "clk1" through "clk24": clock source is CLK1-CLK24, respectively
Ducc.txt24 "brg1" through "brg16": clock source is BRG1-BRG16, respectively
25 "clk1" through "clk24": clock source is CLK1-CLK24, respectively
28 "brg1" through "brg16": clock source is BRG1-BRG16, respectively
29 "clk1" through "clk24": clock source is CLK1-CLK24, respectively
/Documentation/driver-api/media/drivers/
Dpvrusb2.rst84 interfaces tie into the driver through this module. This module
86 and is designed to allow concurrent access through multiple
88 the tuner's frequency through sysfs while simultaneously streaming
89 video through V4L out to an instance of mplayer).
109 (proxy through USB instead of PCI) are enough different that this
116 access to the driver should be through one of the high level
123 will work through here.
151 kernel-friendly I2C adaptor driver, through which other external
154 through here that other V4L modules can reach into this driver to
158 through one of the high level interfaces).
[all …]
/Documentation/networking/devlink/
Detas_es58x.rst24 through ``ethtool -i`` as the first member of the
29 through ``ethtool -i`` as the second member of the
36 - The USB serial number. Also available through ``lsusb -v``.
/Documentation/filesystems/
Dfuse-io.rst11 + write-through
25 write-through mode is the default and is supported on all kernels. The
29 In write-through mode each write is immediately sent to userspace as one or more
39 assumes that all changes to the filesystem go through the FUSE kernel module
Ddax.rst166 Setting the `FS_XFLAG_DAX` flag (specifically or through inheritance) occurs even
175 whether DAX shall be enabled or not from virtiofs server through FUSE protocol,
203 a large amount of memory through a smaller window, then you cannot
235 exposure of uninitialized data through mmap.
259 writing the affected sectors (through the pmem driver, and if the underlying
262 Since `DAX` IO normally doesn't go through the ``driver/bio`` path, applications or
269 happens through the driver, and will clear bad sectors.
278 provided at the block layer through DM, or additionally, at the filesystem
280 can happen either by sending an IO through the driver, or zeroing (also through
/Documentation/devicetree/bindings/sound/
Drt5682.txt11 - AVDD-supply: phandle to the regulator supplying analog power through the
15 bias through the MICVDD pin. Either MICVDD or VBAT should be present.
17 - VBAT-supply: phandle to the regulator supplying battery power through the
20 - DBVDD-supply: phandle to the regulator supplying I/O power through the DBVDD
24 and charge pump through the LDO1_IN pin.
Drealtek,rt5682s.yaml97 description: Regulator supplying analog power through the AVDD pin.
100 description: Regulator supplying power for the microphone bias through the
104 description: Regulator supplying I/O power through the DBVDD pin.
108 through the LDO1_IN pin.
/Documentation/networking/
Drepresentors.rst104 if) their network access is implemented through a virtual switch port. [#]_
110 through a virtual switch port, even if they do not have a corresponding PCIe
113 This allows the entire switching behaviour of the NIC to be controlled through
120 A PCIe function which does not have network access through the internal switch
121 (not even indirectly through the hardware implementation of whatever services
131 network packets pass through the virtual port onto the switch. The network
132 access that the IP stack "sees" would then be configurable through tc rules;
154 through the switchdev function. For example, ``ndo_start_xmit()`` might send
155 the packet through a hardware TX queue attached to the switchdev function, with
163 through ``net_dev->dev.parent`` / ``SET_NETDEV_DEV()``), either of the
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/Documentation/userspace-api/media/v4l/
Dpixfmt-compressed.rst68 through the ``V4L2_CID_STATELESS_H264_DECODE_MODE``
71 required to be passed through the ``V4L2_CID_STATELESS_H264_SPS``,
122 through the ``V4L2_CID_STATELESS_MPEG2_SEQUENCE`` and
124 Quantisation matrices can optionally be specified through the
166 through the ``V4L2_CID_STATELESS_VP8_FRAME`` control.
188 through the ``V4L2_CID_STATELESS_VP9_FRAME`` and
213 through the ``V4L2_CID_MPEG_VIDEO_HEVC_DECODE_MODE``
216 through the following controls:
238 through the ``V4L2_CID_STATELESS_FWHT_PARAMS`` control.
268 frame to decode is required to be passed through the
Ddev-mem2mem.rst29 properties are global to the device (i.e. changing something through one
30 file handle is visible through another file handle).
34 their codec parameters. This is done through codec controls.
/Documentation/arch/s390/
Dvfio-ap-locking.rst72 device driver is using it to plug/unplug AP devices passed through to the KVM
78 AP devices passed through to a KVM guest.
81 if the adapter is passed through to a KVM guest, it will have to be
82 unplugged. In order to figure out whether the adapter is passed through,
85 the mediated device is passed through (matrix_mdev->kvm != NULL) and if so,
89 pointer is not used to plug/unplug devices passed through to the KVM guest;
/Documentation/devicetree/bindings/fpga/
Daltera-freeze-bridge.txt5 changes from passing through the bridge. The controller can also
6 unfreeze/enable the bridges which allows traffic to pass through the
Dxlnx,pr-decoupler.yaml15 which prevents signal changes from passing through the bridge. The controller
16 can also couple / enable the bridges which allows traffic to pass through the
20 eXchange AXI shutdown manager prevents AXI traffic from passing through the
/Documentation/devicetree/bindings/leds/irled/
Dgpio-ir-tx.yaml7 title: IR LED connected through GPIO pin
13 IR LED connected through GPIO pin which is used as remote controller
Dpwm-ir-tx.yaml7 title: IR LED connected through PWM pin
13 IR LED connected through PWM pin which is used as remote controller
/Documentation/devicetree/bindings/gpio/
Dspear_spics.txt4 Cell spi controller through its system registers, which otherwise remains under
11 provides another interface through system registers through which software can
/Documentation/devicetree/bindings/ata/
Dfaraday,ftide010.yaml15 platform. The controller can do PIO modes 0 through 4, Multi-word DMA
16 (MWDM) modes 0 through 2 and Ultra DMA modes 0 through 6.
/Documentation/i2c/
Dsmbus-protocol.rst103 The register is specified through the Comm byte::
116 device, from a designated register that is specified through the Comm
134 register is specified through the Comm byte. This is the opposite of
151 specified through the Comm byte::
165 This command selects a device register (through the Comm byte), sends
180 designated register that is specified through the Comm byte. The amount
197 a device, to a designated register that is specified through the
213 This command selects a device register (through the Comm byte), sends
302 designated register that is specified through the Comm byte::
316 a device, to a designated register that is specified through the
/Documentation/fault-injection/
Dnotifier-error-inject.rst16 This feature is controlled through debugfs interface
35 This feature is controlled through debugfs interface
53 This feature is controlled through debugfs interface
66 This feature is controlled through debugfs interface
/Documentation/ABI/testing/
Dsysfs-class-net-qmi20 through the delegation of the QMI protocol. Userspace
69 Set this to 'Y' to enable 'pass-through' mode, allowing packets
75 'Pass-through' mode can be enabled when the device is in
/Documentation/admin-guide/media/
Dfimc.rst13 data from LCD controller (FIMD) through the SoC internal writeback data
55 data from the sensor through more than one FIMC instance (e.g. for simultaneous
60 through media entity and links enumeration.
90 In order to enable more precise camera pipeline control through the sub-device
97 When we configure these devices through sub-device API at user space, the
134 You can either grep through the kernel log to find relevant information, i.e.
/Documentation/leds/
Dleds-lm3556.rst26 LM3556 Flash can be controlled through /sys/class/leds/flash/brightness file
54 LM3556 torch can be controlled through /sys/class/leds/torch/brightness file.
77 Indicator pattern can be set through /sys/class/leds/indicator/pattern file,
98 Indicator brightness can be controlled through

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