1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3 * Copyright (c) 2015, Linaro Limited
4 */
5 #ifndef __LINUX_ARM_SMCCC_H
6 #define __LINUX_ARM_SMCCC_H
7
8 #include <linux/args.h>
9 #include <linux/init.h>
10 #include <uapi/linux/const.h>
11
12 /*
13 * This file provides common defines for ARM SMC Calling Convention as
14 * specified in
15 * https://developer.arm.com/docs/den0028/latest
16 *
17 * This code is up-to-date with version DEN 0028 C
18 */
19
20 #define ARM_SMCCC_STD_CALL _AC(0,U)
21 #define ARM_SMCCC_FAST_CALL _AC(1,U)
22 #define ARM_SMCCC_TYPE_SHIFT 31
23
24 #define ARM_SMCCC_SMC_32 0
25 #define ARM_SMCCC_SMC_64 1
26 #define ARM_SMCCC_CALL_CONV_SHIFT 30
27
28 #define ARM_SMCCC_OWNER_MASK 0x3F
29 #define ARM_SMCCC_OWNER_SHIFT 24
30
31 #define ARM_SMCCC_FUNC_MASK 0xFFFF
32
33 #define ARM_SMCCC_IS_FAST_CALL(smc_val) \
34 ((smc_val) & (ARM_SMCCC_FAST_CALL << ARM_SMCCC_TYPE_SHIFT))
35 #define ARM_SMCCC_IS_64(smc_val) \
36 ((smc_val) & (ARM_SMCCC_SMC_64 << ARM_SMCCC_CALL_CONV_SHIFT))
37 #define ARM_SMCCC_FUNC_NUM(smc_val) ((smc_val) & ARM_SMCCC_FUNC_MASK)
38 #define ARM_SMCCC_OWNER_NUM(smc_val) \
39 (((smc_val) >> ARM_SMCCC_OWNER_SHIFT) & ARM_SMCCC_OWNER_MASK)
40
41 #define ARM_SMCCC_CALL_VAL(type, calling_convention, owner, func_num) \
42 (((type) << ARM_SMCCC_TYPE_SHIFT) | \
43 ((calling_convention) << ARM_SMCCC_CALL_CONV_SHIFT) | \
44 (((owner) & ARM_SMCCC_OWNER_MASK) << ARM_SMCCC_OWNER_SHIFT) | \
45 ((func_num) & ARM_SMCCC_FUNC_MASK))
46
47 #define ARM_SMCCC_OWNER_ARCH 0
48 #define ARM_SMCCC_OWNER_CPU 1
49 #define ARM_SMCCC_OWNER_SIP 2
50 #define ARM_SMCCC_OWNER_OEM 3
51 #define ARM_SMCCC_OWNER_STANDARD 4
52 #define ARM_SMCCC_OWNER_STANDARD_HYP 5
53 #define ARM_SMCCC_OWNER_VENDOR_HYP 6
54 #define ARM_SMCCC_OWNER_TRUSTED_APP 48
55 #define ARM_SMCCC_OWNER_TRUSTED_APP_END 49
56 #define ARM_SMCCC_OWNER_TRUSTED_OS 50
57 #define ARM_SMCCC_OWNER_TRUSTED_OS_END 63
58
59 #define ARM_SMCCC_FUNC_QUERY_CALL_UID 0xff01
60
61 #define ARM_SMCCC_QUIRK_NONE 0
62 #define ARM_SMCCC_QUIRK_QCOM_A6 1 /* Save/restore register a6 */
63
64 #define ARM_SMCCC_VERSION_1_0 0x10000
65 #define ARM_SMCCC_VERSION_1_1 0x10001
66 #define ARM_SMCCC_VERSION_1_2 0x10002
67 #define ARM_SMCCC_VERSION_1_3 0x10003
68
69 #define ARM_SMCCC_1_3_SVE_HINT 0x10000
70 #define ARM_SMCCC_CALL_HINTS ARM_SMCCC_1_3_SVE_HINT
71
72
73 #define ARM_SMCCC_VERSION_FUNC_ID \
74 ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
75 ARM_SMCCC_SMC_32, \
76 0, 0)
77
78 #define ARM_SMCCC_ARCH_FEATURES_FUNC_ID \
79 ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
80 ARM_SMCCC_SMC_32, \
81 0, 1)
82
83 #define ARM_SMCCC_ARCH_SOC_ID \
84 ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
85 ARM_SMCCC_SMC_32, \
86 0, 2)
87
88 #define ARM_SMCCC_ARCH_WORKAROUND_1 \
89 ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
90 ARM_SMCCC_SMC_32, \
91 0, 0x8000)
92
93 #define ARM_SMCCC_ARCH_WORKAROUND_2 \
94 ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
95 ARM_SMCCC_SMC_32, \
96 0, 0x7fff)
97
98 #define ARM_SMCCC_ARCH_WORKAROUND_3 \
99 ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
100 ARM_SMCCC_SMC_32, \
101 0, 0x3fff)
102
103 #define ARM_SMCCC_VENDOR_HYP_CALL_UID_FUNC_ID \
104 ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
105 ARM_SMCCC_SMC_32, \
106 ARM_SMCCC_OWNER_VENDOR_HYP, \
107 ARM_SMCCC_FUNC_QUERY_CALL_UID)
108
109 /* KVM UID value: 28b46fb6-2ec5-11e9-a9ca-4b564d003a74 */
110 #define ARM_SMCCC_VENDOR_HYP_UID_KVM_REG_0 0xb66fb428U
111 #define ARM_SMCCC_VENDOR_HYP_UID_KVM_REG_1 0xe911c52eU
112 #define ARM_SMCCC_VENDOR_HYP_UID_KVM_REG_2 0x564bcaa9U
113 #define ARM_SMCCC_VENDOR_HYP_UID_KVM_REG_3 0x743a004dU
114
115 /* KVM "vendor specific" services */
116 #define ARM_SMCCC_KVM_FUNC_FEATURES 0
117 #define ARM_SMCCC_KVM_FUNC_PTP 1
118 #define ARM_SMCCC_KVM_FUNC_HYP_MEMINFO 2
119 #define ARM_SMCCC_KVM_FUNC_MEM_SHARE 3
120 #define ARM_SMCCC_KVM_FUNC_MEM_UNSHARE 4
121 #define ARM_SMCCC_KVM_FUNC_MMIO_GUARD_INFO 5
122 #define ARM_SMCCC_KVM_FUNC_MMIO_GUARD_ENROLL 6
123 #define ARM_SMCCC_KVM_FUNC_MMIO_GUARD_MAP 7
124 #define ARM_SMCCC_KVM_FUNC_MMIO_GUARD_UNMAP 8
125 #define ARM_SMCCC_KVM_FUNC_MEM_RELINQUISH 9
126 #define ARM_SMCCC_KVM_FUNC_MMIO_RGUARD_MAP 10
127 #define ARM_SMCCC_KVM_FUNC_MMIO_RGUARD_UNMAP 11
128 #define ARM_SMCCC_KVM_FUNC_FEATURES_2 127
129 #define ARM_SMCCC_KVM_NUM_FUNCS 128
130
131 #define KVM_FUNC_HAS_RANGE BIT(0)
132
133 #define ARM_SMCCC_VENDOR_HYP_KVM_FEATURES_FUNC_ID \
134 ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
135 ARM_SMCCC_SMC_32, \
136 ARM_SMCCC_OWNER_VENDOR_HYP, \
137 ARM_SMCCC_KVM_FUNC_FEATURES)
138
139 #define SMCCC_ARCH_WORKAROUND_RET_UNAFFECTED 1
140
141 /*
142 * ptp_kvm is a feature used for time sync between vm and host.
143 * ptp_kvm module in guest kernel will get service from host using
144 * this hypercall ID.
145 */
146 #define ARM_SMCCC_VENDOR_HYP_KVM_PTP_FUNC_ID \
147 ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
148 ARM_SMCCC_SMC_32, \
149 ARM_SMCCC_OWNER_VENDOR_HYP, \
150 ARM_SMCCC_KVM_FUNC_PTP)
151
152 #define ARM_SMCCC_VENDOR_HYP_KVM_HYP_MEMINFO_FUNC_ID \
153 ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
154 ARM_SMCCC_SMC_64, \
155 ARM_SMCCC_OWNER_VENDOR_HYP, \
156 ARM_SMCCC_KVM_FUNC_HYP_MEMINFO)
157
158 #define ARM_SMCCC_VENDOR_HYP_KVM_MEM_SHARE_FUNC_ID \
159 ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
160 ARM_SMCCC_SMC_64, \
161 ARM_SMCCC_OWNER_VENDOR_HYP, \
162 ARM_SMCCC_KVM_FUNC_MEM_SHARE)
163
164 #define ARM_SMCCC_VENDOR_HYP_KVM_MEM_UNSHARE_FUNC_ID \
165 ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
166 ARM_SMCCC_SMC_64, \
167 ARM_SMCCC_OWNER_VENDOR_HYP, \
168 ARM_SMCCC_KVM_FUNC_MEM_UNSHARE)
169
170 #define ARM_SMCCC_VENDOR_HYP_KVM_MEM_RELINQUISH_FUNC_ID \
171 ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
172 ARM_SMCCC_SMC_64, \
173 ARM_SMCCC_OWNER_VENDOR_HYP, \
174 ARM_SMCCC_KVM_FUNC_MEM_RELINQUISH)
175
176 /* ptp_kvm counter type ID */
177 #define KVM_PTP_VIRT_COUNTER 0
178 #define KVM_PTP_PHYS_COUNTER 1
179
180 #define ARM_SMCCC_VENDOR_HYP_KVM_MMIO_GUARD_INFO_FUNC_ID \
181 ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
182 ARM_SMCCC_SMC_64, \
183 ARM_SMCCC_OWNER_VENDOR_HYP, \
184 ARM_SMCCC_KVM_FUNC_MMIO_GUARD_INFO)
185
186 #define ARM_SMCCC_VENDOR_HYP_KVM_MMIO_GUARD_ENROLL_FUNC_ID \
187 ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
188 ARM_SMCCC_SMC_64, \
189 ARM_SMCCC_OWNER_VENDOR_HYP, \
190 ARM_SMCCC_KVM_FUNC_MMIO_GUARD_ENROLL)
191
192 #define ARM_SMCCC_VENDOR_HYP_KVM_MMIO_GUARD_MAP_FUNC_ID \
193 ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
194 ARM_SMCCC_SMC_64, \
195 ARM_SMCCC_OWNER_VENDOR_HYP, \
196 ARM_SMCCC_KVM_FUNC_MMIO_GUARD_MAP)
197
198 #define ARM_SMCCC_VENDOR_HYP_KVM_MMIO_GUARD_UNMAP_FUNC_ID \
199 ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
200 ARM_SMCCC_SMC_64, \
201 ARM_SMCCC_OWNER_VENDOR_HYP, \
202 ARM_SMCCC_KVM_FUNC_MMIO_GUARD_UNMAP)
203
204 #define ARM_SMCCC_VENDOR_HYP_KVM_MMIO_RGUARD_MAP_FUNC_ID \
205 ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
206 ARM_SMCCC_SMC_64, \
207 ARM_SMCCC_OWNER_VENDOR_HYP, \
208 ARM_SMCCC_KVM_FUNC_MMIO_RGUARD_MAP)
209
210 #define ARM_SMCCC_VENDOR_HYP_KVM_MMIO_RGUARD_UNMAP_FUNC_ID \
211 ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
212 ARM_SMCCC_SMC_64, \
213 ARM_SMCCC_OWNER_VENDOR_HYP, \
214 ARM_SMCCC_KVM_FUNC_MMIO_RGUARD_UNMAP)
215
216 /* Paravirtualised time calls (defined by ARM DEN0057A) */
217 #define ARM_SMCCC_HV_PV_TIME_FEATURES \
218 ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
219 ARM_SMCCC_SMC_64, \
220 ARM_SMCCC_OWNER_STANDARD_HYP, \
221 0x20)
222
223 #define ARM_SMCCC_HV_PV_TIME_ST \
224 ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
225 ARM_SMCCC_SMC_64, \
226 ARM_SMCCC_OWNER_STANDARD_HYP, \
227 0x21)
228
229 /* TRNG entropy source calls (defined by ARM DEN0098) */
230 #define ARM_SMCCC_TRNG_VERSION \
231 ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
232 ARM_SMCCC_SMC_32, \
233 ARM_SMCCC_OWNER_STANDARD, \
234 0x50)
235
236 #define ARM_SMCCC_TRNG_FEATURES \
237 ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
238 ARM_SMCCC_SMC_32, \
239 ARM_SMCCC_OWNER_STANDARD, \
240 0x51)
241
242 #define ARM_SMCCC_TRNG_GET_UUID \
243 ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
244 ARM_SMCCC_SMC_32, \
245 ARM_SMCCC_OWNER_STANDARD, \
246 0x52)
247
248 #define ARM_SMCCC_TRNG_RND32 \
249 ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
250 ARM_SMCCC_SMC_32, \
251 ARM_SMCCC_OWNER_STANDARD, \
252 0x53)
253
254 #define ARM_SMCCC_TRNG_RND64 \
255 ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
256 ARM_SMCCC_SMC_64, \
257 ARM_SMCCC_OWNER_STANDARD, \
258 0x53)
259
260 /*
261 * Return codes defined in ARM DEN 0070A
262 * ARM DEN 0070A is now merged/consolidated into ARM DEN 0028 C
263 */
264 #define SMCCC_RET_SUCCESS 0
265 #define SMCCC_RET_NOT_SUPPORTED -1
266 #define SMCCC_RET_NOT_REQUIRED -2
267 #define SMCCC_RET_INVALID_PARAMETER -3
268
269 #ifndef __ASSEMBLY__
270
271 #include <linux/linkage.h>
272 #include <linux/types.h>
273
274 enum arm_smccc_conduit {
275 SMCCC_CONDUIT_NONE,
276 SMCCC_CONDUIT_SMC,
277 SMCCC_CONDUIT_HVC,
278 };
279
280 /**
281 * arm_smccc_1_1_get_conduit()
282 *
283 * Returns the conduit to be used for SMCCCv1.1 or later.
284 *
285 * When SMCCCv1.1 is not present, returns SMCCC_CONDUIT_NONE.
286 */
287 enum arm_smccc_conduit arm_smccc_1_1_get_conduit(void);
288
289 /**
290 * arm_smccc_get_version()
291 *
292 * Returns the version to be used for SMCCCv1.1 or later.
293 *
294 * When SMCCCv1.1 or above is not present, returns SMCCCv1.0, but this
295 * does not imply the presence of firmware or a valid conduit. Caller
296 * handling SMCCCv1.0 must determine the conduit by other means.
297 */
298 u32 arm_smccc_get_version(void);
299
300 void __init arm_smccc_version_init(u32 version, enum arm_smccc_conduit conduit);
301
302 extern u64 smccc_has_sve_hint;
303
304 /**
305 * arm_smccc_get_soc_id_version()
306 *
307 * Returns the SOC ID version.
308 *
309 * When ARM_SMCCC_ARCH_SOC_ID is not present, returns SMCCC_RET_NOT_SUPPORTED.
310 */
311 s32 arm_smccc_get_soc_id_version(void);
312
313 /**
314 * arm_smccc_get_soc_id_revision()
315 *
316 * Returns the SOC ID revision.
317 *
318 * When ARM_SMCCC_ARCH_SOC_ID is not present, returns SMCCC_RET_NOT_SUPPORTED.
319 */
320 s32 arm_smccc_get_soc_id_revision(void);
321
322 /**
323 * struct arm_smccc_res - Result from SMC/HVC call
324 * @a0-a3 result values from registers 0 to 3
325 */
326 struct arm_smccc_res {
327 unsigned long a0;
328 unsigned long a1;
329 unsigned long a2;
330 unsigned long a3;
331 };
332
333 #ifdef CONFIG_ARM64
334 /**
335 * struct arm_smccc_1_2_regs - Arguments for or Results from SMC/HVC call
336 * @a0-a17 argument values from registers 0 to 17
337 */
338 struct arm_smccc_1_2_regs {
339 unsigned long a0;
340 unsigned long a1;
341 unsigned long a2;
342 unsigned long a3;
343 unsigned long a4;
344 unsigned long a5;
345 unsigned long a6;
346 unsigned long a7;
347 unsigned long a8;
348 unsigned long a9;
349 unsigned long a10;
350 unsigned long a11;
351 unsigned long a12;
352 unsigned long a13;
353 unsigned long a14;
354 unsigned long a15;
355 unsigned long a16;
356 unsigned long a17;
357 };
358
359 /**
360 * arm_smccc_1_2_hvc() - make HVC calls
361 * @args: arguments passed via struct arm_smccc_1_2_regs
362 * @res: result values via struct arm_smccc_1_2_regs
363 *
364 * This function is used to make HVC calls following SMC Calling Convention
365 * v1.2 or above. The content of the supplied param are copied from the
366 * structure to registers prior to the HVC instruction. The return values
367 * are updated with the content from registers on return from the HVC
368 * instruction.
369 */
370 asmlinkage void arm_smccc_1_2_hvc(const struct arm_smccc_1_2_regs *args,
371 struct arm_smccc_1_2_regs *res);
372
373 /**
374 * arm_smccc_1_2_smc() - make SMC calls
375 * @args: arguments passed via struct arm_smccc_1_2_regs
376 * @res: result values via struct arm_smccc_1_2_regs
377 *
378 * This function is used to make SMC calls following SMC Calling Convention
379 * v1.2 or above. The content of the supplied param are copied from the
380 * structure to registers prior to the SMC instruction. The return values
381 * are updated with the content from registers on return from the SMC
382 * instruction.
383 */
384 asmlinkage void arm_smccc_1_2_smc(const struct arm_smccc_1_2_regs *args,
385 struct arm_smccc_1_2_regs *res);
386 #endif
387
388 /**
389 * struct arm_smccc_quirk - Contains quirk information
390 * @id: quirk identification
391 * @state: quirk specific information
392 * @a6: Qualcomm quirk entry for returning post-smc call contents of a6
393 */
394 struct arm_smccc_quirk {
395 int id;
396 union {
397 unsigned long a6;
398 } state;
399 };
400
401 /**
402 * __arm_smccc_sve_check() - Set the SVE hint bit when doing SMC calls
403 *
404 * Sets the SMCCC hint bit to indicate if there is live state in the SVE
405 * registers, this modifies x0 in place and should never be called from C
406 * code.
407 */
408 asmlinkage unsigned long __arm_smccc_sve_check(unsigned long x0);
409
410 /**
411 * __arm_smccc_smc() - make SMC calls
412 * @a0-a7: arguments passed in registers 0 to 7
413 * @res: result values from registers 0 to 3
414 * @quirk: points to an arm_smccc_quirk, or NULL when no quirks are required.
415 *
416 * This function is used to make SMC calls following SMC Calling Convention.
417 * The content of the supplied param are copied to registers 0 to 7 prior
418 * to the SMC instruction. The return values are updated with the content
419 * from register 0 to 3 on return from the SMC instruction. An optional
420 * quirk structure provides vendor specific behavior.
421 */
422 #ifdef CONFIG_HAVE_ARM_SMCCC
423 asmlinkage void __arm_smccc_smc(unsigned long a0, unsigned long a1,
424 unsigned long a2, unsigned long a3, unsigned long a4,
425 unsigned long a5, unsigned long a6, unsigned long a7,
426 struct arm_smccc_res *res, struct arm_smccc_quirk *quirk);
427 #else
__arm_smccc_smc(unsigned long a0,unsigned long a1,unsigned long a2,unsigned long a3,unsigned long a4,unsigned long a5,unsigned long a6,unsigned long a7,struct arm_smccc_res * res,struct arm_smccc_quirk * quirk)428 static inline void __arm_smccc_smc(unsigned long a0, unsigned long a1,
429 unsigned long a2, unsigned long a3, unsigned long a4,
430 unsigned long a5, unsigned long a6, unsigned long a7,
431 struct arm_smccc_res *res, struct arm_smccc_quirk *quirk)
432 {
433 *res = (struct arm_smccc_res){};
434 }
435 #endif
436
437 /**
438 * __arm_smccc_hvc() - make HVC calls
439 * @a0-a7: arguments passed in registers 0 to 7
440 * @res: result values from registers 0 to 3
441 * @quirk: points to an arm_smccc_quirk, or NULL when no quirks are required.
442 *
443 * This function is used to make HVC calls following SMC Calling
444 * Convention. The content of the supplied param are copied to registers 0
445 * to 7 prior to the HVC instruction. The return values are updated with
446 * the content from register 0 to 3 on return from the HVC instruction. An
447 * optional quirk structure provides vendor specific behavior.
448 */
449 asmlinkage void __arm_smccc_hvc(unsigned long a0, unsigned long a1,
450 unsigned long a2, unsigned long a3, unsigned long a4,
451 unsigned long a5, unsigned long a6, unsigned long a7,
452 struct arm_smccc_res *res, struct arm_smccc_quirk *quirk);
453
454 #define arm_smccc_smc(...) __arm_smccc_smc(__VA_ARGS__, NULL)
455
456 #define arm_smccc_smc_quirk(...) __arm_smccc_smc(__VA_ARGS__)
457
458 #define arm_smccc_hvc(...) __arm_smccc_hvc(__VA_ARGS__, NULL)
459
460 #define arm_smccc_hvc_quirk(...) __arm_smccc_hvc(__VA_ARGS__)
461
462 /* SMCCC v1.1 implementation madness follows */
463 #ifdef CONFIG_ARM64
464
465 #define SMCCC_SMC_INST "smc #0"
466 #define SMCCC_HVC_INST "hvc #0"
467
468 #elif defined(CONFIG_ARM)
469 #include <asm/opcodes-sec.h>
470 #include <asm/opcodes-virt.h>
471
472 #define SMCCC_SMC_INST __SMC(0)
473 #define SMCCC_HVC_INST __HVC(0)
474
475 #endif
476
477 /* nVHE hypervisor doesn't have a current thread so needs separate checks */
478 #if defined(CONFIG_ARM64_SVE) && !defined(__KVM_NVHE_HYPERVISOR__)
479
480 #define SMCCC_SVE_CHECK ALTERNATIVE("nop \n", "bl __arm_smccc_sve_check \n", \
481 ARM64_SVE)
482 #define smccc_sve_clobbers "x16", "x30", "cc",
483
484 #else
485
486 #define SMCCC_SVE_CHECK
487 #define smccc_sve_clobbers
488
489 #endif
490
491 #define __constraint_read_2 "r" (arg0)
492 #define __constraint_read_3 __constraint_read_2, "r" (arg1)
493 #define __constraint_read_4 __constraint_read_3, "r" (arg2)
494 #define __constraint_read_5 __constraint_read_4, "r" (arg3)
495 #define __constraint_read_6 __constraint_read_5, "r" (arg4)
496 #define __constraint_read_7 __constraint_read_6, "r" (arg5)
497 #define __constraint_read_8 __constraint_read_7, "r" (arg6)
498 #define __constraint_read_9 __constraint_read_8, "r" (arg7)
499
500 #define __declare_arg_2(a0, res) \
501 struct arm_smccc_res *___res = res; \
502 register unsigned long arg0 asm("r0") = (u32)a0
503
504 #define __declare_arg_3(a0, a1, res) \
505 typeof(a1) __a1 = a1; \
506 struct arm_smccc_res *___res = res; \
507 register unsigned long arg0 asm("r0") = (u32)a0; \
508 register typeof(a1) arg1 asm("r1") = __a1
509
510 #define __declare_arg_4(a0, a1, a2, res) \
511 typeof(a1) __a1 = a1; \
512 typeof(a2) __a2 = a2; \
513 struct arm_smccc_res *___res = res; \
514 register unsigned long arg0 asm("r0") = (u32)a0; \
515 register typeof(a1) arg1 asm("r1") = __a1; \
516 register typeof(a2) arg2 asm("r2") = __a2
517
518 #define __declare_arg_5(a0, a1, a2, a3, res) \
519 typeof(a1) __a1 = a1; \
520 typeof(a2) __a2 = a2; \
521 typeof(a3) __a3 = a3; \
522 struct arm_smccc_res *___res = res; \
523 register unsigned long arg0 asm("r0") = (u32)a0; \
524 register typeof(a1) arg1 asm("r1") = __a1; \
525 register typeof(a2) arg2 asm("r2") = __a2; \
526 register typeof(a3) arg3 asm("r3") = __a3
527
528 #define __declare_arg_6(a0, a1, a2, a3, a4, res) \
529 typeof(a4) __a4 = a4; \
530 __declare_arg_5(a0, a1, a2, a3, res); \
531 register typeof(a4) arg4 asm("r4") = __a4
532
533 #define __declare_arg_7(a0, a1, a2, a3, a4, a5, res) \
534 typeof(a5) __a5 = a5; \
535 __declare_arg_6(a0, a1, a2, a3, a4, res); \
536 register typeof(a5) arg5 asm("r5") = __a5
537
538 #define __declare_arg_8(a0, a1, a2, a3, a4, a5, a6, res) \
539 typeof(a6) __a6 = a6; \
540 __declare_arg_7(a0, a1, a2, a3, a4, a5, res); \
541 register typeof(a6) arg6 asm("r6") = __a6
542
543 #define __declare_arg_9(a0, a1, a2, a3, a4, a5, a6, a7, res) \
544 typeof(a7) __a7 = a7; \
545 __declare_arg_8(a0, a1, a2, a3, a4, a5, a6, res); \
546 register typeof(a7) arg7 asm("r7") = __a7
547
548 /*
549 * We have an output list that is not necessarily used, and GCC feels
550 * entitled to optimise the whole sequence away. "volatile" is what
551 * makes it stick.
552 */
553 #define __arm_smccc_1_1(inst, ...) \
554 do { \
555 register unsigned long r0 asm("r0"); \
556 register unsigned long r1 asm("r1"); \
557 register unsigned long r2 asm("r2"); \
558 register unsigned long r3 asm("r3"); \
559 CONCATENATE(__declare_arg_, \
560 COUNT_ARGS(__VA_ARGS__))(__VA_ARGS__); \
561 asm volatile(SMCCC_SVE_CHECK \
562 inst "\n" : \
563 "=r" (r0), "=r" (r1), "=r" (r2), "=r" (r3) \
564 : CONCATENATE(__constraint_read_, \
565 COUNT_ARGS(__VA_ARGS__)) \
566 : smccc_sve_clobbers "memory"); \
567 if (___res) \
568 *___res = (typeof(*___res)){r0, r1, r2, r3}; \
569 } while (0)
570
571 /*
572 * arm_smccc_1_1_smc() - make an SMCCC v1.1 compliant SMC call
573 *
574 * This is a variadic macro taking one to eight source arguments, and
575 * an optional return structure.
576 *
577 * @a0-a7: arguments passed in registers 0 to 7
578 * @res: result values from registers 0 to 3
579 *
580 * This macro is used to make SMC calls following SMC Calling Convention v1.1.
581 * The content of the supplied param are copied to registers 0 to 7 prior
582 * to the SMC instruction. The return values are updated with the content
583 * from register 0 to 3 on return from the SMC instruction if not NULL.
584 */
585 #define arm_smccc_1_1_smc(...) __arm_smccc_1_1(SMCCC_SMC_INST, __VA_ARGS__)
586
587 /*
588 * arm_smccc_1_1_hvc() - make an SMCCC v1.1 compliant HVC call
589 *
590 * This is a variadic macro taking one to eight source arguments, and
591 * an optional return structure.
592 *
593 * @a0-a7: arguments passed in registers 0 to 7
594 * @res: result values from registers 0 to 3
595 *
596 * This macro is used to make HVC calls following SMC Calling Convention v1.1.
597 * The content of the supplied param are copied to registers 0 to 7 prior
598 * to the HVC instruction. The return values are updated with the content
599 * from register 0 to 3 on return from the HVC instruction if not NULL.
600 */
601 #define arm_smccc_1_1_hvc(...) __arm_smccc_1_1(SMCCC_HVC_INST, __VA_ARGS__)
602
603 /*
604 * Like arm_smccc_1_1* but always returns SMCCC_RET_NOT_SUPPORTED.
605 * Used when the SMCCC conduit is not defined. The empty asm statement
606 * avoids compiler warnings about unused variables.
607 */
608 #define __fail_smccc_1_1(...) \
609 do { \
610 CONCATENATE(__declare_arg_, \
611 COUNT_ARGS(__VA_ARGS__))(__VA_ARGS__); \
612 asm ("" : \
613 : CONCATENATE(__constraint_read_, \
614 COUNT_ARGS(__VA_ARGS__)) \
615 : smccc_sve_clobbers "memory"); \
616 if (___res) \
617 ___res->a0 = SMCCC_RET_NOT_SUPPORTED; \
618 } while (0)
619
620 /*
621 * arm_smccc_1_1_invoke() - make an SMCCC v1.1 compliant call
622 *
623 * This is a variadic macro taking one to eight source arguments, and
624 * an optional return structure.
625 *
626 * @a0-a7: arguments passed in registers 0 to 7
627 * @res: result values from registers 0 to 3
628 *
629 * This macro will make either an HVC call or an SMC call depending on the
630 * current SMCCC conduit. If no valid conduit is available then -1
631 * (SMCCC_RET_NOT_SUPPORTED) is returned in @res.a0 (if supplied).
632 *
633 * The return value also provides the conduit that was used.
634 */
635 #define arm_smccc_1_1_invoke(...) ({ \
636 int method = arm_smccc_1_1_get_conduit(); \
637 switch (method) { \
638 case SMCCC_CONDUIT_HVC: \
639 arm_smccc_1_1_hvc(__VA_ARGS__); \
640 break; \
641 case SMCCC_CONDUIT_SMC: \
642 arm_smccc_1_1_smc(__VA_ARGS__); \
643 break; \
644 default: \
645 __fail_smccc_1_1(__VA_ARGS__); \
646 method = SMCCC_CONDUIT_NONE; \
647 break; \
648 } \
649 method; \
650 })
651
652 #endif /*__ASSEMBLY__*/
653 #endif /*__LINUX_ARM_SMCCC_H*/
654