Home
last modified time | relevance | path

Searched refs:val (Results 1 – 25 of 73) sorted by relevance

123

/Documentation/usb/
Dgadget_hid.rst144 unsigned char val;
148 {.opt = "--left-ctrl", .val = 0x01},
149 {.opt = "--right-ctrl", .val = 0x10},
150 {.opt = "--left-shift", .val = 0x02},
151 {.opt = "--right-shift", .val = 0x20},
152 {.opt = "--left-alt", .val = 0x04},
153 {.opt = "--right-alt", .val = 0x40},
154 {.opt = "--left-meta", .val = 0x08},
155 {.opt = "--right-meta", .val = 0x80},
160 {.opt = "--return", .val = 0x28},
[all …]
/Documentation/translations/zh_CN/core-api/
Dthis_cpu_ops.rst47 this_cpu_write(pcp, val)
48 this_cpu_add(pcp, val)
49 this_cpu_and(pcp, val)
50 this_cpu_or(pcp, val)
51 this_cpu_add_return(pcp, val)
55 this_cpu_sub(pcp, val)
58 this_cpu_sub_return(pcp, val)
205 __this_cpu_write(pcp, val)
206 __this_cpu_add(pcp, val)
207 __this_cpu_and(pcp, val)
[all …]
/Documentation/devicetree/bindings/leds/
Dleds-netxbig.txt16 - mode-val: Mode to value mapping. Each entry is represented by two integers:
38 mode-val = <NETXBIG_LED_OFF 0
48 mode-val = <NETXBIG_LED_OFF 0
57 mode-val = <NETXBIG_LED_OFF 0
67 mode-val = <NETXBIG_LED_OFF 0
76 mode-val = <NETXBIG_LED_OFF 0
86 mode-val = <NETXBIG_LED_OFF 0
/Documentation/translations/zh_CN/driver-api/
Dio_ordering.rst29 CPU A: val = readl(my_status);
35 CPU B: val = readl(my_status);
46 CPU A: val = readl(my_status);
53 CPU B: val = readl(my_status);
/Documentation/translations/zh_TW/
Dio_ordering.txt36 CPU A: val = readl(my_status);
42 CPU B: val = readl(my_status);
53 CPU A: val = readl(my_status);
60 CPU B: val = readl(my_status);
/Documentation/trace/
Dhistogram-design.rst76 histogram val and key in the histogram (variables are also included
104 you can see, there are two fields in the fields array, one val field
115 | .fields[] |---->| val = hitcount |----------------------------+
159 .key value is 0 and its .val pointer is NULL. Once a map_entry has | |
161 .val member points to a map_elt containing the full key and an entry | |
180 | .val |---> NULL | |
186 | .val |--->| map_elt | | |
190 . | .fields |--->| .sum (val) |<-+ |
196 | .val |---> NULL . | |
200 | .key | | .sum (val) or | | |
[all …]
Devents-msr.rst18 - val: Value written
27 - val: Value written
/Documentation/translations/zh_CN/userspace-api/
Dfutex2.rst34 __u64 val;
41 地址, ``val`` 为期望值, ``flags`` 为指定的类型(如private)和futex的大小。
52 对于每个 ``waiters`` 数组中的项,在 ``uaddr`` 的当前值会和 ``val`` 比较。如果
/Documentation/i2c/
Dslave-interface.rst60 ret = i2c_slave_event(client, event, &val)
63 types described hereafter. 'val' holds an u8 value for the data byte to be
64 read/written and is thus bidirectional. The pointer to val must always be
65 provided even if val is not used for an event, i.e. don't use NULL here. 'ret'
73 'val': unused
87 'val': backend returns first byte to be sent
97 'val': bus driver delivers received byte
101 Another I2C master has sent a byte to us which needs to be set in 'val'. If 'ret'
107 'val': backend returns next byte to be sent
112 'val'. Important: This does not mean that the previous byte has been acked, it
[all …]
/Documentation/driver-api/
Dio_ordering.rst19 CPU A: val = readl(my_status);
25 CPU B: val = readl(my_status);
36 CPU A: val = readl(my_status);
43 CPU B: val = readl(my_status);
Dconnector.rst35 __u32 val;
38 idx and val are unique identifiers which must be registered in the
40 callback function which will be called when a message with above idx.val
/Documentation/core-api/
Dthis_cpu_ops.rst49 this_cpu_write(pcp, val)
50 this_cpu_add(pcp, val)
51 this_cpu_and(pcp, val)
52 this_cpu_or(pcp, val)
53 this_cpu_add_return(pcp, val)
56 this_cpu_sub(pcp, val)
59 this_cpu_sub_return(pcp, val)
237 __this_cpu_write(pcp, val)
238 __this_cpu_add(pcp, val)
239 __this_cpu_and(pcp, val)
[all …]
/Documentation/translations/zh_CN/arch/arm/
Dkernel_user_helpers.txt166 int atomic_add(volatile int *ptr, int val)
172 new = old + val;
264 int64_t atomic_add64(volatile int64_t *ptr, int64_t val)
270 new = old + val;
/Documentation/
Dconf.py192 key, val = [x.strip() for x in line.split('=', 2)] variable
194 makefile_version = val
196 makefile_patchlevel = val
/Documentation/trace/coresight/
Dcoresight-etm4x-reference.rst198 ``echo val > addr_exlevel_s_ns``
200 val is a 7 bit value for exception levels to exclude. Input
254 ``echo val > sshot_ctrl``
256 Writes val into the selected control register.
284 ``echo val > sshot_pe_ctrl``
286 Writes val into the selected control register.
363 ``echo val > cntr_ctrl``
365 Where val is per ETMv4 spec.
376 ``echo val > cntrldvr``
378 Where val is per ETMv4 spec.
[all …]
/Documentation/translations/zh_CN/arch/arm64/
Delf_hwcaps.rst49 idreg.field == val 表示有某个功能。
51 当 idreg.field 中有 val 时,hwcaps 表示 ARM ARM 定义的功能是有效的,但是
52 并不是说要完全和 val 相等,也不是说 idreg.field 描述的其他功能就是缺失的。
/Documentation/translations/zh_TW/arch/arm64/
Delf_hwcaps.rst52 idreg.field == val 表示有某個功能。
54 當 idreg.field 中有 val 時,hwcaps 表示 ARM ARM 定義的功能是有效的,但是
55 並不是說要完全和 val 相等,也不是說 idreg.field 描述的其他功能就是缺失的。
/Documentation/translations/zh_CN/PCI/
Dpci.rst497 for (i = 8; --i; val >>= 1) {
498 outb(val & 1, ioport_reg); /* 置位 */
504 for (i = 8; --i; val >>= 1) {
505 writeb(val & 1, mmio_reg); /* 置位 */
/Documentation/driver-api/media/
Dv4l2-controls.rst270 write_reg(0x123, ctrl->val);
273 write_reg(0x456, ctrl->val);
329 s32 val;
331 s32 val;
342 &ctrl->val == ctrl->p_new.p_s32
343 &ctrl->cur.val == ctrl->p_cur.p_s32
345 For all other types use ctrl->p_cur.p<something>. Basically the val
346 and cur.val fields can be considered an alias since these are used so often.
348 Within the control ops you can freely use these. The val and cur.val speak for
370 ctrl->val = read_reg(0x123);
[all …]
/Documentation/userspace-api/
Dfutex2.rst29 __u64 val;
36 using ``uaddr`` for the address to wait for, ``val`` for the expected value
53 to ``val``. If it's different, the syscall undo all the work done so far and
/Documentation/translations/zh_CN/rust/
Dcoding-guidelines.rst125 Some(val) => val,
/Documentation/userspace-api/media/v4l/
Dvidioc-dbg-g-register.rst57 ``val`` field the value to be written into the register.
62 the driver stores the register value in the ``val`` field and the size
130 - ``val``
/Documentation/arch/arm/
Dkernel_user_helpers.rst153 int atomic_add(volatile int *ptr, int val)
159 new = old + val;
249 int64_t atomic_add64(volatile int64_t *ptr, int64_t val)
255 new = old + val;
/Documentation/input/devices/
Diforce-protocol.rst313 OP= 40 <idx> <val> [<val>]
328 OP= 42 <val>
340 OP= 43 <val>
/Documentation/driver-api/iio/
Dhw-consumer.rst31 struct iio_chan_spec const *chan, int *val,

123