Searched refs:MSR_P6_EVNTSEL0 (Results 1 – 6 of 6) sorted by relevance
| /arch/x86/events/intel/ |
| D | p6.c | 143 rdmsrl(MSR_P6_EVNTSEL0, val); in p6_pmu_disable_all()
145 wrmsrl(MSR_P6_EVNTSEL0, val); in p6_pmu_disable_all()
153 rdmsrl(MSR_P6_EVNTSEL0, val); in p6_pmu_enable_all()
155 wrmsrl(MSR_P6_EVNTSEL0, val); in p6_pmu_enable_all()
210 .eventsel = MSR_P6_EVNTSEL0,
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| /arch/x86/kvm/vmx/ |
| D | pmu_intel.c | 95 return get_gp_pmc(pmu, MSR_P6_EVNTSEL0 + pmc_idx, in intel_pmc_idx_to_pmc()
96 MSR_P6_EVNTSEL0); in intel_pmc_idx_to_pmc()
222 get_gp_pmc(pmu, msr, MSR_P6_EVNTSEL0) || in intel_is_valid_msr()
237 pmc = pmc ? pmc : get_gp_pmc(pmu, msr, MSR_P6_EVNTSEL0); in intel_msr_idx_to_pmc()
379 } else if ((pmc = get_gp_pmc(pmu, msr, MSR_P6_EVNTSEL0))) { in intel_pmu_get_msr()
446 } else if ((pmc = get_gp_pmc(pmu, msr, MSR_P6_EVNTSEL0))) { in intel_pmu_set_msr()
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| /arch/x86/kernel/cpu/ |
| D | perfctr-watchdog.c | 93 return msr - MSR_P6_EVNTSEL0; in nmi_evntsel_msr_to_bit()
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| /arch/x86/xen/ |
| D | pmu.c | 179 if ((msr_index >= MSR_P6_EVNTSEL0) && in is_intel_pmu_msr()
180 (msr_index < MSR_P6_EVNTSEL0 + intel_num_arch_counters)) { in is_intel_pmu_msr()
181 *index = msr_index - MSR_P6_EVNTSEL0; in is_intel_pmu_msr()
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| /arch/x86/include/asm/ |
| D | msr-index.h | 539 #define MSR_P6_EVNTSEL0 0x00000186 macro
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| /arch/x86/kvm/ |
| D | x86.c | 3904 case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1: in kvm_set_msr_common()
4090 case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1: in kvm_get_msr_common()
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