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/arch/mips/cavium-octeon/crypto/
Docteon-md5.c55 const u64 *block = _block; in octeon_md5_transform() local
57 write_octeon_64bit_block_dword(block[0], 0); in octeon_md5_transform()
58 write_octeon_64bit_block_dword(block[1], 1); in octeon_md5_transform()
59 write_octeon_64bit_block_dword(block[2], 2); in octeon_md5_transform()
60 write_octeon_64bit_block_dword(block[3], 3); in octeon_md5_transform()
61 write_octeon_64bit_block_dword(block[4], 4); in octeon_md5_transform()
62 write_octeon_64bit_block_dword(block[5], 5); in octeon_md5_transform()
63 write_octeon_64bit_block_dword(block[6], 6); in octeon_md5_transform()
64 octeon_md5_start(block[7]); in octeon_md5_transform()
85 const u32 avail = sizeof(mctx->block) - (mctx->byte_count & 0x3f); in octeon_md5_update()
[all …]
Docteon-sha512.c58 const u64 *block = _block; in octeon_sha512_transform() local
60 write_octeon_64bit_block_sha512(block[0], 0); in octeon_sha512_transform()
61 write_octeon_64bit_block_sha512(block[1], 1); in octeon_sha512_transform()
62 write_octeon_64bit_block_sha512(block[2], 2); in octeon_sha512_transform()
63 write_octeon_64bit_block_sha512(block[3], 3); in octeon_sha512_transform()
64 write_octeon_64bit_block_sha512(block[4], 4); in octeon_sha512_transform()
65 write_octeon_64bit_block_sha512(block[5], 5); in octeon_sha512_transform()
66 write_octeon_64bit_block_sha512(block[6], 6); in octeon_sha512_transform()
67 write_octeon_64bit_block_sha512(block[7], 7); in octeon_sha512_transform()
68 write_octeon_64bit_block_sha512(block[8], 8); in octeon_sha512_transform()
[all …]
Docteon-sha1.c63 const u64 *block = _block; in octeon_sha1_transform() local
65 write_octeon_64bit_block_dword(block[0], 0); in octeon_sha1_transform()
66 write_octeon_64bit_block_dword(block[1], 1); in octeon_sha1_transform()
67 write_octeon_64bit_block_dword(block[2], 2); in octeon_sha1_transform()
68 write_octeon_64bit_block_dword(block[3], 3); in octeon_sha1_transform()
69 write_octeon_64bit_block_dword(block[4], 4); in octeon_sha1_transform()
70 write_octeon_64bit_block_dword(block[5], 5); in octeon_sha1_transform()
71 write_octeon_64bit_block_dword(block[6], 6); in octeon_sha1_transform()
72 octeon_sha1_start(block[7]); in octeon_sha1_transform()
Docteon-sha256.c55 const u64 *block = _block; in octeon_sha256_transform() local
57 write_octeon_64bit_block_dword(block[0], 0); in octeon_sha256_transform()
58 write_octeon_64bit_block_dword(block[1], 1); in octeon_sha256_transform()
59 write_octeon_64bit_block_dword(block[2], 2); in octeon_sha256_transform()
60 write_octeon_64bit_block_dword(block[3], 3); in octeon_sha256_transform()
61 write_octeon_64bit_block_dword(block[4], 4); in octeon_sha256_transform()
62 write_octeon_64bit_block_dword(block[5], 5); in octeon_sha256_transform()
63 write_octeon_64bit_block_dword(block[6], 6); in octeon_sha256_transform()
64 octeon_sha256_start(block[7]); in octeon_sha256_transform()
/arch/mips/alchemy/common/
Dvss.c23 static inline void __enable_block(int block) in __enable_block() argument
25 void __iomem *base = (void __iomem *)VSS_ADDR(block); in __enable_block()
54 static inline void __disable_block(int block) in __disable_block() argument
56 void __iomem *base = (void __iomem *)VSS_ADDR(block); in __disable_block()
70 void au1300_vss_block_control(int block, int enable) in au1300_vss_block_control() argument
80 __enable_block(block); in au1300_vss_block_control()
82 __disable_block(block); in au1300_vss_block_control()
Dusb.c265 static inline int au1300_usb_control(int block, int enable) in au1300_usb_control() argument
271 switch (block) { in au1300_usb_control()
360 static inline int au1200_usb_control(int block, int enable) in au1200_usb_control() argument
365 switch (block) { in au1200_usb_control()
458 static inline int au1000_usb_control(int block, int enable, unsigned long rb, in au1000_usb_control() argument
463 switch (block) { in au1000_usb_control()
478 int alchemy_usb_control(int block, int enable) in alchemy_usb_control() argument
488 ret = au1000_usb_control(block, enable, in alchemy_usb_control()
492 ret = au1000_usb_control(block, enable, in alchemy_usb_control()
496 ret = au1200_usb_control(block, enable); in alchemy_usb_control()
[all …]
/arch/x86/crypto/
Dblake2s-glue.c19 const u8 *block, const size_t nblocks,
22 const u8 *block, const size_t nblocks,
28 void blake2s_compress(struct blake2s_state *state, const u8 *block, in blake2s_compress() argument
35 blake2s_compress_generic(state, block, nblocks, inc); in blake2s_compress()
46 blake2s_compress_avx512(state, block, blocks, inc); in blake2s_compress()
48 blake2s_compress_ssse3(state, block, blocks, inc); in blake2s_compress()
52 block += blocks * BLAKE2S_BLOCK_SIZE; in blake2s_compress()
/arch/powerpc/mm/kasan/
D8xx.c10 kasan_init_shadow_8M(unsigned long k_start, unsigned long k_end, void *block) in kasan_init_shadow_8M() argument
15 for (k_cur = k_start; k_cur != k_end; k_cur = k_next, pmd += 2, block += SZ_8M) { in kasan_init_shadow_8M()
27 *new = pte_val(pte_mkhuge(pfn_pte(PHYS_PFN(__pa(block)), PAGE_KERNEL))); in kasan_init_shadow_8M()
41 void *block; in kasan_init_region() local
43 block = memblock_alloc(k_end - k_start, SZ_8M); in kasan_init_region()
44 if (!block) in kasan_init_region()
48 kasan_init_shadow_8M(k_start, ALIGN_DOWN(k_end, SZ_8M), block); in kasan_init_region()
62 void *va = block + k_cur - k_start; in kasan_init_region()
Dinit_32.c61 void *block; in kasan_init_region() local
68 block = memblock_alloc(k_end - k_start, PAGE_SIZE); in kasan_init_region()
69 if (!block) in kasan_init_region()
74 void *va = block + k_cur - k_start; in kasan_init_region()
/arch/x86/kernel/cpu/mce/
Damd.c399 b->bank, b->block, b->address, hi, lo); in lvt_off_valid()
414 b->cpu, apic, b->bank, b->block, b->address, hi, lo); in lvt_off_valid()
527 static u32 smca_get_block_address(unsigned int bank, unsigned int block, in smca_get_block_address() argument
530 if (!block) in smca_get_block_address()
536 return MSR_AMD64_SMCA_MCx_MISCy(bank, block - 1); in smca_get_block_address()
540 unsigned int bank, unsigned int block, in get_block_address() argument
545 if ((bank >= per_cpu(mce_num_banks, cpu)) || (block >= NR_BLOCKS)) in get_block_address()
549 return smca_get_block_address(bank, block, cpu); in get_block_address()
552 switch (block) { in get_block_address()
568 prepare_threshold_block(unsigned int bank, unsigned int block, u32 addr, in prepare_threshold_block() argument
[all …]
/arch/s390/kernel/
Dsthyi.c229 struct diag204_x_phys_block *block, in fill_diag_mac() argument
234 for (i = 0; i < block->hdr.cpus; i++) { in fill_diag_mac()
235 switch (cpu_id(block->cpus[i].ctidx, diag224_buf)) { in fill_diag_mac()
237 if (block->cpus[i].weight == DED_WEIGHT) in fill_diag_mac()
243 if (block->cpus[i].weight == DED_WEIGHT) in fill_diag_mac()
257 struct diag204_x_part_block *block) in lpar_cpu_inf() argument
262 for (i = 0; i < block->hdr.rcpus; i++) { in lpar_cpu_inf()
263 if (!(block->cpus[i].cflag & DIAG204_CPU_ONLINE)) in lpar_cpu_inf()
266 switch (cpu_id(block->cpus[i].ctidx, diag224_buf)) { in lpar_cpu_inf()
269 if (block->cpus[i].cur_weight < DED_WEIGHT) in lpar_cpu_inf()
[all …]
/arch/powerpc/crypto/
Dmd5-glue.c54 memcpy((char *)sctx->block + offset, src, len); in ppc_md5_update()
59 memcpy((char *)sctx->block + offset, src, avail); in ppc_md5_update()
60 ppc_md5_transform(sctx->hash, (const u8 *)sctx->block, 1); in ppc_md5_update()
71 memcpy((char *)sctx->block, src, len); in ppc_md5_update()
79 const u8 *src = (const u8 *)sctx->block; in ppc_md5_final()
82 __le64 *pbits = (__le64 *)((char *)sctx->block + 56); in ppc_md5_final()
90 p = (char *)sctx->block; in ppc_md5_final()
Daes-gcm-p10.S585 li 11, 0 # block index
637 # check partial block
683 lxvb16x 15, 0, 14 # load block
684 lxvb16x 16, 15, 14 # load block
685 lxvb16x 17, 16, 14 # load block
686 lxvb16x 18, 17, 14 # load block
687 lxvb16x 19, 18, 14 # load block
688 lxvb16x 20, 19, 14 # load block
689 lxvb16x 21, 20, 14 # load block
690 lxvb16x 22, 21, 14 # load block
[all …]
/arch/arm/crypto/
Dblake2b-neon-glue.c19 const u8 *block, size_t nblocks, u32 inc);
22 const u8 *block, size_t nblocks, u32 inc) in blake2b_compress_arch() argument
25 blake2b_compress_generic(state, block, nblocks, inc); in blake2b_compress_arch()
34 blake2b_compress_neon(state, block, blocks, inc); in blake2b_compress_arch()
38 block += blocks * BLAKE2B_BLOCK_SIZE; in blake2b_compress_arch()
/arch/powerpc/lib/
Drheap.c47 rh_block_t *block, *blk; in grow() local
57 block = kmalloc_array(max_blocks, sizeof(rh_block_t), GFP_ATOMIC); in grow()
58 if (block == NULL) in grow()
64 memcpy(block, info->block, in grow()
67 delta = (char *)block - (char *)info->block; in grow()
70 blks = (unsigned long)info->block; in grow()
71 blke = (unsigned long)(info->block + info->max_blocks); in grow()
73 for (i = 0, blk = block; i < info->max_blocks; i++, blk++) in grow()
82 kfree(info->block); in grow()
85 info->block = block; in grow()
[all …]
/arch/mips/cavium-octeon/executive/
Dcvmx-interrupt-rsl.c42 void __cvmx_interrupt_gmxx_rxx_int_en_enable(int index, int block);
50 void __cvmx_interrupt_asxx_enable(int block) in __cvmx_interrupt_asxx_enable() argument
65 csr.u64 = cvmx_read_csr(CVMX_ASXX_INT_EN(block)); in __cvmx_interrupt_asxx_enable()
69 cvmx_write_csr(CVMX_ASXX_INT_EN(block), csr.u64); in __cvmx_interrupt_asxx_enable()
Dcvmx-interrupt-decodes.c53 void __cvmx_interrupt_gmxx_rxx_int_en_enable(int index, int block) in __cvmx_interrupt_gmxx_rxx_int_en_enable() argument
56 cvmx_write_csr(CVMX_GMXX_RXX_INT_REG(index, block), in __cvmx_interrupt_gmxx_rxx_int_en_enable()
57 cvmx_read_csr(CVMX_GMXX_RXX_INT_REG(index, block))); in __cvmx_interrupt_gmxx_rxx_int_en_enable()
229 cvmx_write_csr(CVMX_GMXX_RXX_INT_EN(index, block), gmx_rx_int_en.u64); in __cvmx_interrupt_gmxx_rxx_int_en_enable()
236 void __cvmx_interrupt_pcsx_intx_en_reg_enable(int index, int block) in __cvmx_interrupt_pcsx_intx_en_reg_enable() argument
239 cvmx_write_csr(CVMX_PCSX_INTX_REG(index, block), in __cvmx_interrupt_pcsx_intx_en_reg_enable()
240 cvmx_read_csr(CVMX_PCSX_INTX_REG(index, block))); in __cvmx_interrupt_pcsx_intx_en_reg_enable()
272 cvmx_write_csr(CVMX_PCSX_INTX_EN_REG(index, block), pcs_int_en_reg.u64); in __cvmx_interrupt_pcsx_intx_en_reg_enable()
/arch/arm/kernel/
Dsetup.c444 int block; in cpuid_init_hwcaps() local
452 block = cpuid_feature_extract(CPUID_EXT_ISAR0, 24); in cpuid_init_hwcaps()
453 if (block >= 2) in cpuid_init_hwcaps()
455 if (block >= 1) in cpuid_init_hwcaps()
459 block = cpuid_feature_extract(CPUID_EXT_MMFR0, 0); in cpuid_init_hwcaps()
460 if (block >= 5) in cpuid_init_hwcaps()
466 block = cpuid_feature_extract_field(isar5, 4); in cpuid_init_hwcaps()
467 if (block >= 2) in cpuid_init_hwcaps()
469 if (block >= 1) in cpuid_init_hwcaps()
472 block = cpuid_feature_extract_field(isar5, 8); in cpuid_init_hwcaps()
[all …]
/arch/sparc/crypto/
Dmd5_glue.c54 memcpy((u8 *)sctx->block + partial, data, done); in __md5_sparc64_update()
55 md5_sparc64_transform(sctx->hash, (u8 *)sctx->block, 1); in __md5_sparc64_update()
64 memcpy(sctx->block, data + done, len - done); in __md5_sparc64_update()
76 memcpy((u8 *)sctx->block + partial, data, len); in md5_sparc64_update()
101 memcpy((u8 *)sctx->block + index, padding, padlen); in md5_sparc64_final()
/arch/riscv/boot/dts/sifive/
Dfu540-c000.dtsi28 i-cache-block-size = <64>;
42 d-cache-block-size = <64>;
48 i-cache-block-size = <64>;
66 d-cache-block-size = <64>;
72 i-cache-block-size = <64>;
90 d-cache-block-size = <64>;
96 i-cache-block-size = <64>;
114 d-cache-block-size = <64>;
120 i-cache-block-size = <64>;
289 cache-block-size = <64>;
Dfu740-c000.dtsi28 i-cache-block-size = <64>;
43 d-cache-block-size = <64>;
49 i-cache-block-size = <64>;
67 d-cache-block-size = <64>;
73 i-cache-block-size = <64>;
91 d-cache-block-size = <64>;
97 i-cache-block-size = <64>;
115 d-cache-block-size = <64>;
121 i-cache-block-size = <64>;
294 cache-block-size = <64>;
/arch/x86/boot/
Dheader.S418 # 1 bit (last block flag)
419 # 2 bits (block type)
421 # 1 block occurs every 32K -1 bytes or when there 50% compression
422 # has been achieved. The smallest block type encoding is always used.
448 # The worst case at the block level is a growth of the compressed data
451 # The worst case internal to a compressed block is very hard to figure.
457 # to be safe. To avoid problems at the block level allocating 5 extra bytes
459 # block adding an extra 32767 bytes (the worst case uncompressed block size)
461 # block will stop the byte before the compressed data for a block begins.
486 # byte fixed overhead but has a maximum block size of 128K, so it needs a
/arch/riscv/boot/dts/thead/
Dth1520.dtsi24 i-cache-block-size = <64>;
27 d-cache-block-size = <64>;
45 i-cache-block-size = <64>;
48 d-cache-block-size = <64>;
66 i-cache-block-size = <64>;
69 d-cache-block-size = <64>;
87 i-cache-block-size = <64>;
90 d-cache-block-size = <64>;
105 cache-block-size = <64>;
287 snps,block-size = <65536 65536 65536 65536>;
/arch/powerpc/include/asm/
Drheap.h30 rh_block_t *block; member
57 rh_block_t * block);
/arch/um/drivers/
Drandom.c34 static int rng_dev_read(struct hwrng *rng, void *buf, size_t max, bool block) in rng_dev_read() argument
40 if (block && ret == -EAGAIN) { in rng_dev_read()

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