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/arch/powerpc/kernel/
Dcacheinfo.c43 struct cache *cache; member
117 struct cache { struct
124 struct cache *next_local; /* next cache of >= level */ argument
139 static const char *cache_type_string(const struct cache *cache) in cache_type_string() argument
141 return cache_type_info[cache->type].name; in cache_type_string()
144 static void cache_init(struct cache *cache, int type, int level, in cache_init() argument
147 cache->type = type; in cache_init()
148 cache->level = level; in cache_init()
149 cache->ofnode = of_node_get(ofnode); in cache_init()
150 cache->group_id = group_id; in cache_init()
[all …]
/arch/arm64/boot/dts/amd/
Damd-seattle-cpus.dtsi49 i-cache-size = <0xC000>;
50 i-cache-line-size = <64>;
51 i-cache-sets = <256>;
52 d-cache-size = <0x8000>;
53 d-cache-line-size = <64>;
54 d-cache-sets = <256>;
55 l2-cache = <&L2_0>;
65 i-cache-size = <0xC000>;
66 i-cache-line-size = <64>;
67 i-cache-sets = <256>;
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/arch/arm64/boot/dts/amazon/
Dalpine-v3.dtsi28 d-cache-size = <0x8000>;
29 d-cache-line-size = <64>;
30 d-cache-sets = <256>;
31 i-cache-size = <0xc000>;
32 i-cache-line-size = <64>;
33 i-cache-sets = <256>;
34 next-level-cache = <&cluster0_l2>;
42 d-cache-size = <0x8000>;
43 d-cache-line-size = <64>;
44 d-cache-sets = <256>;
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/arch/arm64/boot/dts/ti/
Dk3-am654.dtsi41 i-cache-size = <0x8000>;
42 i-cache-line-size = <64>;
43 i-cache-sets = <256>;
44 d-cache-size = <0x8000>;
45 d-cache-line-size = <64>;
46 d-cache-sets = <128>;
47 next-level-cache = <&L2_0>;
55 i-cache-size = <0x8000>;
56 i-cache-line-size = <64>;
57 i-cache-sets = <256>;
[all …]
Dk3-am62a7.dtsi44 i-cache-size = <0x8000>;
45 i-cache-line-size = <64>;
46 i-cache-sets = <256>;
47 d-cache-size = <0x8000>;
48 d-cache-line-size = <64>;
49 d-cache-sets = <128>;
50 next-level-cache = <&L2_0>;
58 i-cache-size = <0x8000>;
59 i-cache-line-size = <64>;
60 i-cache-sets = <256>;
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Dk3-am62p5.dtsi43 i-cache-size = <0x8000>;
44 i-cache-line-size = <64>;
45 i-cache-sets = <256>;
46 d-cache-size = <0x8000>;
47 d-cache-line-size = <64>;
48 d-cache-sets = <128>;
49 next-level-cache = <&l2_0>;
58 i-cache-size = <0x8000>;
59 i-cache-line-size = <64>;
60 i-cache-sets = <256>;
[all …]
Dk3-am625.dtsi44 i-cache-size = <0x8000>;
45 i-cache-line-size = <64>;
46 i-cache-sets = <256>;
47 d-cache-size = <0x8000>;
48 d-cache-line-size = <64>;
49 d-cache-sets = <128>;
50 next-level-cache = <&L2_0>;
60 i-cache-size = <0x8000>;
61 i-cache-line-size = <64>;
62 i-cache-sets = <256>;
[all …]
Dk3-j784s4.dtsi70 i-cache-size = <0xc000>;
71 i-cache-line-size = <64>;
72 i-cache-sets = <256>;
73 d-cache-size = <0x8000>;
74 d-cache-line-size = <64>;
75 d-cache-sets = <256>;
76 next-level-cache = <&L2_0>;
84 i-cache-size = <0xc000>;
85 i-cache-line-size = <64>;
86 i-cache-sets = <256>;
[all …]
Dk3-am642.dtsi34 i-cache-size = <0x8000>;
35 i-cache-line-size = <64>;
36 i-cache-sets = <256>;
37 d-cache-size = <0x8000>;
38 d-cache-line-size = <64>;
39 d-cache-sets = <128>;
40 next-level-cache = <&L2_0>;
48 i-cache-size = <0x8000>;
49 i-cache-line-size = <64>;
50 i-cache-sets = <256>;
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/arch/arm64/boot/dts/marvell/
Darmada-ap806-quad.dtsi25 i-cache-size = <0xc000>;
26 i-cache-line-size = <64>;
27 i-cache-sets = <256>;
28 d-cache-size = <0x8000>;
29 d-cache-line-size = <64>;
30 d-cache-sets = <256>;
31 next-level-cache = <&l2_0>;
40 i-cache-size = <0xc000>;
41 i-cache-line-size = <64>;
42 i-cache-sets = <256>;
[all …]
Darmada-ap807-quad.dtsi25 i-cache-size = <0xc000>;
26 i-cache-line-size = <64>;
27 i-cache-sets = <256>;
28 d-cache-size = <0x8000>;
29 d-cache-line-size = <64>;
30 d-cache-sets = <256>;
31 next-level-cache = <&l2_0>;
40 i-cache-size = <0xc000>;
41 i-cache-line-size = <64>;
42 i-cache-sets = <256>;
[all …]
Darmada-ap806-dual.dtsi25 i-cache-size = <0xc000>;
26 i-cache-line-size = <64>;
27 i-cache-sets = <256>;
28 d-cache-size = <0x8000>;
29 d-cache-line-size = <64>;
30 d-cache-sets = <256>;
31 next-level-cache = <&l2>;
40 i-cache-size = <0xc000>;
41 i-cache-line-size = <64>;
42 i-cache-sets = <256>;
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/arch/arm64/boot/dts/arm/
Djuno.dts92 i-cache-size = <0xc000>;
93 i-cache-line-size = <64>;
94 i-cache-sets = <256>;
95 d-cache-size = <0x8000>;
96 d-cache-line-size = <64>;
97 d-cache-sets = <256>;
98 next-level-cache = <&A57_L2>;
110 i-cache-size = <0xc000>;
111 i-cache-line-size = <64>;
112 i-cache-sets = <256>;
[all …]
Djuno-r1.dts93 i-cache-size = <0xc000>;
94 i-cache-line-size = <64>;
95 i-cache-sets = <256>;
96 d-cache-size = <0x8000>;
97 d-cache-line-size = <64>;
98 d-cache-sets = <256>;
99 next-level-cache = <&A57_L2>;
110 i-cache-size = <0xc000>;
111 i-cache-line-size = <64>;
112 i-cache-sets = <256>;
[all …]
Djuno-r2.dts93 i-cache-size = <0xc000>;
94 i-cache-line-size = <64>;
95 i-cache-sets = <256>;
96 d-cache-size = <0x8000>;
97 d-cache-line-size = <64>;
98 d-cache-sets = <256>;
99 next-level-cache = <&A72_L2>;
111 i-cache-size = <0xc000>;
112 i-cache-line-size = <64>;
113 i-cache-sets = <256>;
[all …]
Dfvp-base-revc.dts50 i-cache-size = <0x8000>;
51 i-cache-line-size = <64>;
52 i-cache-sets = <256>;
53 d-cache-size = <0x8000>;
54 d-cache-line-size = <64>;
55 d-cache-sets = <256>;
56 next-level-cache = <&C0_L2>;
63 i-cache-size = <0x8000>;
64 i-cache-line-size = <64>;
65 i-cache-sets = <256>;
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/arch/arm/boot/dts/broadcom/
Dbcm2836.dtsi43 /* Source for d/i-cache-line-size and d/i-cache-sets
47 * Source for d/i-cache-size
56 d-cache-size = <0x8000>;
57 d-cache-line-size = <64>;
58 d-cache-sets = <128>; // 32KiB(size)/64(line-size)=512ways/4-way set
59 i-cache-size = <0x8000>;
60 i-cache-line-size = <32>;
61 i-cache-sets = <512>; // 32KiB(size)/32(line-size)=1024ways/2-way set
62 next-level-cache = <&l2>;
70 d-cache-size = <0x8000>;
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Dbcm2837.dtsi42 /* Source for d/i-cache-line-size and d/i-cache-sets
46 * Source for d/i-cache-size
55 d-cache-size = <0x8000>;
56 d-cache-line-size = <64>;
57 d-cache-sets = <128>; // 32KiB(size)/64(line-size)=512ways/4-way set
58 i-cache-size = <0x8000>;
59 i-cache-line-size = <64>;
60 i-cache-sets = <256>; // 32KiB(size)/64(line-size)=512ways/2-way set
61 next-level-cache = <&l2>;
70 d-cache-size = <0x8000>;
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/arch/arm64/boot/dts/qcom/
Dsm4450.dtsi40 next-level-cache = <&L2_0>;
45 L2_0: l2-cache {
46 compatible = "cache";
47 cache-level = <2>;
48 cache-unified;
49 next-level-cache = <&L3_0>;
51 L3_0: l3-cache {
52 compatible = "cache";
53 cache-level = <3>;
54 cache-unified;
[all …]
/arch/arm64/boot/dts/apple/
Dt6002.dtsi73 next-level-cache = <&l2_cache_3>;
74 i-cache-size = <0x20000>;
75 d-cache-size = <0x10000>;
87 next-level-cache = <&l2_cache_3>;
88 i-cache-size = <0x20000>;
89 d-cache-size = <0x10000>;
101 next-level-cache = <&l2_cache_4>;
102 i-cache-size = <0x30000>;
103 d-cache-size = <0x20000>;
115 next-level-cache = <&l2_cache_4>;
[all …]
Dt600x-common.dtsi65 next-level-cache = <&l2_cache_0>;
66 i-cache-size = <0x20000>;
67 d-cache-size = <0x10000>;
79 next-level-cache = <&l2_cache_0>;
80 i-cache-size = <0x20000>;
81 d-cache-size = <0x10000>;
93 next-level-cache = <&l2_cache_1>;
94 i-cache-size = <0x30000>;
95 d-cache-size = <0x20000>;
107 next-level-cache = <&l2_cache_1>;
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/arch/arm64/boot/dts/freescale/
Dimx8qm.dtsi68 i-cache-size = <0x8000>;
69 i-cache-line-size = <64>;
70 i-cache-sets = <256>;
71 d-cache-size = <0x8000>;
72 d-cache-line-size = <64>;
73 d-cache-sets = <128>;
74 next-level-cache = <&A53_L2>;
85 i-cache-size = <0x8000>;
86 i-cache-line-size = <64>;
87 i-cache-sets = <256>;
[all …]
Dimx8qxp.dtsi64 i-cache-size = <0x8000>;
65 i-cache-line-size = <64>;
66 i-cache-sets = <256>;
67 d-cache-size = <0x8000>;
68 d-cache-line-size = <64>;
69 d-cache-sets = <128>;
70 next-level-cache = <&A35_L2>;
81 i-cache-size = <0x8000>;
82 i-cache-line-size = <64>;
83 i-cache-sets = <256>;
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/arch/riscv/boot/dts/sifive/
Dfu540-c000.dtsi28 i-cache-block-size = <64>;
29 i-cache-sets = <128>;
30 i-cache-size = <16384>;
42 d-cache-block-size = <64>;
43 d-cache-sets = <64>;
44 d-cache-size = <32768>;
48 i-cache-block-size = <64>;
49 i-cache-sets = <64>;
50 i-cache-size = <32768>;
57 next-level-cache = <&l2cache>;
[all …]
Dfu740-c000.dtsi28 i-cache-block-size = <64>;
29 i-cache-sets = <128>;
30 i-cache-size = <16384>;
31 next-level-cache = <&ccache>;
43 d-cache-block-size = <64>;
44 d-cache-sets = <64>;
45 d-cache-size = <32768>;
49 i-cache-block-size = <64>;
50 i-cache-sets = <128>;
51 i-cache-size = <32768>;
[all …]

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