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/arch/powerpc/platforms/pseries/
Dmsi.c223 struct msi_counts *counts = data; in count_non_bridge_devices() local
233 counts->num_devices++; in count_non_bridge_devices()
240 struct msi_counts *counts = data; in count_spare_msis() local
244 if (dn == counts->requestor) in count_spare_msis()
245 req = counts->request; in count_spare_msis()
259 if (req < counts->quota) in count_spare_msis()
260 counts->spare += counts->quota - req; in count_spare_msis()
261 else if (req > counts->quota) in count_spare_msis()
262 counts->over_quota++; in count_spare_msis()
270 struct msi_counts counts; in msi_quota_for_device() local
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/arch/x86/hyperv/
Dhv_proc.c27 int *counts; in hv_call_deposit_pages() local
48 counts = kcalloc(HV_DEPOSIT_MAX, sizeof(int), GFP_KERNEL); in hv_call_deposit_pages()
49 if (!counts) { in hv_call_deposit_pages()
74 counts[i] = 1 << order; in hv_call_deposit_pages()
75 num_pages -= counts[i]; in hv_call_deposit_pages()
89 for (j = 0; j < counts[i]; ++j, ++page_count) in hv_call_deposit_pages()
107 for (j = 0; j < counts[i]; ++j) in hv_call_deposit_pages()
113 kfree(counts); in hv_call_deposit_pages()
/arch/x86/kernel/cpu/resctrl/
Dpseudo_lock.c956 struct residency_counts *counts) in measure_residency_fn() argument
1064 counts->miss_before = miss_before; in measure_residency_fn()
1065 counts->hits_before = hits_before; in measure_residency_fn()
1066 counts->miss_after = miss_after; in measure_residency_fn()
1067 counts->hits_after = hits_after; in measure_residency_fn()
1074 struct residency_counts counts = {0}; in measure_l2_residency() local
1096 measure_residency_fn(&perf_miss_attr, &perf_hit_attr, plr, &counts); in measure_l2_residency()
1101 trace_pseudo_lock_l2(counts.hits_after - counts.hits_before, in measure_l2_residency()
1102 counts.miss_after - counts.miss_before); in measure_l2_residency()
1112 struct residency_counts counts = {0}; in measure_l3_residency() local
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/arch/ia64/kernel/
Dsmp.c257 unsigned short *counts = __ia64_per_cpu_var(shadow_flush_counts); in smp_flush_tlb_cpumask() local
265 counts[cpu] = local_tlb_flush_counts[cpu].count & 0xffff; in smp_flush_tlb_cpumask()
279 while(counts[cpu] == (local_tlb_flush_counts[cpu].count & 0xffff)) in smp_flush_tlb_cpumask()
/arch/x86/kernel/cpu/
Daperfmperf.c190 u64 ratios, counts; in skx_set_max_freq_ratio() local
204 err = rdmsrl_safe(MSR_TURBO_RATIO_LIMIT1, &counts); in skx_set_max_freq_ratio()
209 group_size = (counts >> i) & 0xFF; in skx_set_max_freq_ratio()
/arch/x86/ras/
DKconfig7 page PFN and counts their repeated occurrence. Once the counter for a
/arch/x86/events/intel/
Dds.c2161 short counts[INTEL_PMC_IDX_FIXED + MAX_FIXED_PEBS_EVENTS] = {}; in intel_pmu_drain_pebs_nhm() local
2196 counts[bit]++; in intel_pmu_drain_pebs_nhm()
2239 counts[bit]++; in intel_pmu_drain_pebs_nhm()
2243 if ((counts[bit] == 0) && (error[bit] == 0)) in intel_pmu_drain_pebs_nhm()
2261 if (counts[bit]) { in intel_pmu_drain_pebs_nhm()
2263 top, bit, counts[bit], in intel_pmu_drain_pebs_nhm()
2271 short counts[INTEL_PMC_IDX_FIXED + MAX_FIXED_PEBS_EVENTS] = {}; in intel_pmu_drain_pebs_icl() local
2305 counts[bit]++; in intel_pmu_drain_pebs_icl()
2309 if (counts[bit] == 0) in intel_pmu_drain_pebs_icl()
2320 top, bit, counts[bit], in intel_pmu_drain_pebs_icl()
/arch/sparc/lib/
DM7memset.S129 cmp %o2, 7 ! if small counts, just write bytes
/arch/sh/lib/
Dmemcpy-sh4.S197 ! cycle counts for differnet sizes using byte-at-a-time vs. optimised):
/arch/
DKconfig1358 bool "Locking event counts collection"
1364 differences. The counts are reported via debugfs.