| /arch/mips/bcm63xx/ |
| D | cs.c | 24 static int is_valid_cs(unsigned int cs) in is_valid_cs() argument
26 if (cs > 6) in is_valid_cs()
35 int bcm63xx_set_cs_base(unsigned int cs, u32 base, unsigned int size) in bcm63xx_set_cs_base() argument
40 if (!is_valid_cs(cs)) in bcm63xx_set_cs_base()
55 bcm_mpi_writel(val, MPI_CSBASE_REG(cs)); in bcm63xx_set_cs_base()
66 int bcm63xx_set_cs_timing(unsigned int cs, unsigned int wait, in bcm63xx_set_cs_timing() argument
72 if (!is_valid_cs(cs)) in bcm63xx_set_cs_timing()
76 val = bcm_mpi_readl(MPI_CSCTL_REG(cs)); in bcm63xx_set_cs_timing()
83 bcm_mpi_writel(val, MPI_CSCTL_REG(cs)); in bcm63xx_set_cs_timing()
94 int bcm63xx_set_cs_param(unsigned int cs, u32 params) in bcm63xx_set_cs_param() argument
[all …]
|
| D | dev-pcmcia.c | 69 static int __init config_pcmcia_cs(unsigned int cs, in config_pcmcia_cs() argument
74 ret = bcm63xx_set_cs_status(cs, 0); in config_pcmcia_cs()
76 ret = bcm63xx_set_cs_base(cs, base, size); in config_pcmcia_cs()
78 ret = bcm63xx_set_cs_status(cs, 1); in config_pcmcia_cs()
83 unsigned int cs; member
88 .cs = MPI_CS_PCMCIA_COMMON,
93 .cs = MPI_CS_PCMCIA_ATTR,
98 .cs = MPI_CS_PCMCIA_IO,
132 ret = config_pcmcia_cs(pcmcia_cs[i].cs, in bcm63xx_pcmcia_register()
|
| /arch/x86/kernel/ |
| D | time.c | 101 void clocksource_arch_init(struct clocksource *cs) in clocksource_arch_init() argument
103 if (cs->vdso_clock_mode == VDSO_CLOCKMODE_NONE) in clocksource_arch_init()
106 if (cs->mask != CLOCKSOURCE_MASK(64)) { in clocksource_arch_init()
108 cs->name, cs->mask); in clocksource_arch_init()
109 cs->vdso_clock_mode = VDSO_CLOCKMODE_NONE; in clocksource_arch_init()
|
| D | callthunks.c | 252 callthunks_setup(struct callthunk_sites *cs, const struct core_text *ct) in callthunks_setup() argument
255 patch_call_sites(cs->call_start, cs->call_end, ct); in callthunks_setup()
256 patch_paravirt_call_sites(cs->pv_start, cs->pv_end, ct); in callthunks_setup()
262 struct callthunk_sites cs = { in callthunks_patch_builtin_calls() local
274 callthunks_setup(&cs, &builtin_coretext); in callthunks_patch_builtin_calls()
328 void noinline callthunks_patch_module_calls(struct callthunk_sites *cs, in callthunks_patch_module_calls() argument
341 callthunks_setup(cs, &ct); in callthunks_patch_module_calls()
|
| /arch/mips/include/asm/mach-bcm63xx/ |
| D | bcm63xx_cs.h | 5 int bcm63xx_set_cs_base(unsigned int cs, u32 base, unsigned int size);
6 int bcm63xx_set_cs_timing(unsigned int cs, unsigned int wait,
8 int bcm63xx_set_cs_param(unsigned int cs, u32 flags);
9 int bcm63xx_set_cs_status(unsigned int cs, int enable);
|
| /arch/m68k/lib/ |
| D | memset.c | 21 char *cs = s; in memset() local
22 *cs++ = c; in memset()
23 s = cs; in memset()
69 char *cs = s; in memset() local
70 *cs = c; in memset()
|
| /arch/x86/lib/ |
| D | string_32.c | 96 int strcmp(const char *cs, const char *ct) in strcmp() argument
111 : "1" (cs), "2" (ct) in strcmp()
119 int strncmp(const char *cs, const char *ct, size_t count) in strncmp() argument
136 : "1" (cs), "2" (ct), "3" (count) in strncmp()
181 void *memchr(const void *cs, int c, size_t count) in memchr() argument
193 : "a" (c), "0" (cs), "1" (count) in memchr()
|
| D | strstr_32.c | 5 char *strstr(const char *cs, const char *ct) in strstr() argument
29 : "0" (0), "1" (0xffffffff), "2" (cs), "g" (ct) in strstr()
|
| /arch/arm/boot/dts/ti/keystone/ |
| D | keystone-k2l-evm.dts | 67 ti,cs-chipselect = <0>;
69 ti,cs-min-turnaround-ns = <12>;
70 ti,cs-read-hold-ns = <6>;
71 ti,cs-read-strobe-ns = <23>;
72 ti,cs-read-setup-ns = <9>;
73 ti,cs-write-hold-ns = <8>;
74 ti,cs-write-strobe-ns = <23>;
75 ti,cs-write-setup-ns = <8>;
|
| D | keystone-k2e-evm.dts | 94 ti,cs-chipselect = <0>;
96 ti,cs-min-turnaround-ns = <12>;
97 ti,cs-read-hold-ns = <6>;
98 ti,cs-read-strobe-ns = <23>;
99 ti,cs-read-setup-ns = <9>;
100 ti,cs-write-hold-ns = <8>;
101 ti,cs-write-strobe-ns = <23>;
102 ti,cs-write-setup-ns = <8>;
|
| D | keystone-k2hk-evm.dts | 111 ti,cs-chipselect = <0>;
113 ti,cs-min-turnaround-ns = <12>;
114 ti,cs-read-hold-ns = <6>;
115 ti,cs-read-strobe-ns = <23>;
116 ti,cs-read-setup-ns = <9>;
117 ti,cs-write-hold-ns = <8>;
118 ti,cs-write-strobe-ns = <23>;
119 ti,cs-write-setup-ns = <8>;
|
| /arch/arm/mach-footbridge/ |
| D | dc21285-timer.c | 23 static u64 cksrc_dc21285_read(struct clocksource *cs) in cksrc_dc21285_read() argument
25 return cs->mask - *CSR_TIMER2_VALUE; in cksrc_dc21285_read()
28 static int cksrc_dc21285_enable(struct clocksource *cs) in cksrc_dc21285_enable() argument
30 *CSR_TIMER2_LOAD = cs->mask; in cksrc_dc21285_enable()
36 static void cksrc_dc21285_disable(struct clocksource *cs) in cksrc_dc21285_disable() argument
|
| /arch/arm/boot/dts/st/ |
| D | stm32mp15xx-dhcor-drc-compact.dtsi | 143 st,fmc2-ebi-cs-mux-enable;
144 st,fmc2-ebi-cs-transaction-type = <4>;
145 st,fmc2-ebi-cs-buswidth = <16>;
146 st,fmc2-ebi-cs-address-setup-ns = <5>;
147 st,fmc2-ebi-cs-address-hold-ns = <5>;
148 st,fmc2-ebi-cs-bus-turnaround-ns = <5>;
149 st,fmc2-ebi-cs-data-setup-ns = <45>;
150 st,fmc2-ebi-cs-data-hold-ns = <1>;
151 st,fmc2-ebi-cs-write-address-setup-ns = <5>;
152 st,fmc2-ebi-cs-write-address-hold-ns = <5>;
[all …]
|
| /arch/mips/kernel/ |
| D | csrc-bcm1480.c | 19 static u64 bcm1480_hpt_read(struct clocksource *cs) in bcm1480_hpt_read() argument
39 struct clocksource *cs = &bcm1480_clocksource; in sb1480_clocksource_init() local
45 clocksource_register_hz(cs, zbbus); in sb1480_clocksource_init()
|
| D | csrc-sb1250.c | 35 static u64 sb1250_hpt_read(struct clocksource *cs) in sb1250_hpt_read() argument
55 struct clocksource *cs = &bcm1250_clocksource; in sb1250_clocksource_init() local
68 clocksource_register_hz(cs, V_SCD_TIMER_FREQ); in sb1250_clocksource_init()
|
| /arch/mips/cavium-octeon/ |
| D | octeon-platform.c | 932 int cs, bootbus; in octeon_prune_device_tree() local
954 for (cs = 0; cs < 8; cs++) { in octeon_prune_device_tree()
955 mio_boot_reg_cfg.u64 = cvmx_read_csr(CVMX_MIO_BOOT_REG_CFGX(cs)); in octeon_prune_device_tree()
964 if (cs >= 7) { in octeon_prune_device_tree()
978 cvmx_read_csr(CVMX_MIO_BOOT_REG_CFGX(cs + 1)); in octeon_prune_device_tree()
995 new_reg[0] = cpu_to_be32(cs); in octeon_prune_device_tree()
998 new_reg[3] = cpu_to_be32(cs + 1); in octeon_prune_device_tree()
1011 ranges[(cs * 5) + 2] = cpu_to_be32(region_base >> 32); in octeon_prune_device_tree()
1012 ranges[(cs * 5) + 3] = cpu_to_be32(region_base & 0xffffffff); in octeon_prune_device_tree()
1013 ranges[(cs * 5) + 4] = cpu_to_be32(region_size); in octeon_prune_device_tree()
[all …]
|
| /arch/nios2/kernel/ |
| D | time.c | 48 struct clocksource cs; member
58 to_nios2_clksource(struct clocksource *cs) in to_nios2_clksource() argument
60 return container_of(cs, struct nios2_clocksource, cs); in to_nios2_clksource()
84 static u64 nios2_timer_read(struct clocksource *cs) in nios2_timer_read() argument
86 struct nios2_clocksource *nios2_cs = to_nios2_clksource(cs); in nios2_timer_read()
99 .cs = {
112 return nios2_timer_read(&nios2_cs.cs); in get_cycles()
295 ret = clocksource_register_hz(&nios2_cs.cs, freq); in nios2_clocksource_init()
|
| /arch/x86/include/asm/ |
| D | ptrace.h | 49 unsigned short cs; member
87 unsigned long cs; member
134 return ((regs->cs & SEGMENT_RPL_MASK) | (regs->flags & X86_VM_MASK)) >= USER_RPL; in user_mode()
136 return !!(regs->cs & 3); in user_mode()
157 return regs->cs == __USER_CS; in user_64bit_mode()
160 return regs->cs == __USER_CS || regs->cs == pv_info.extra_user_64bit_cs; in user_64bit_mode()
260 if (offset == offsetof(struct pt_regs, cs) || in regs_get_register()
|
| /arch/mips/sgi-ip30/ |
| D | ip30-timer.c | 22 static u64 ip30_heart_counter_read(struct clocksource *cs) in ip30_heart_counter_read() argument
42 struct clocksource *cs = &ip30_heart_clocksource; in ip30_heart_clocksource_init() local
44 clocksource_register_hz(cs, HEART_CYCLES_PER_SEC); in ip30_heart_clocksource_init()
|
| /arch/mips/txx9/generic/ |
| D | mem_tx4927.c | 45 unsigned int cs = 0; in tx4927_process_sdccr() local
60 cs = 256 << sdccr_cs; in tx4927_process_sdccr()
64 return rs * cs * mw * bs; in tx4927_process_sdccr()
|
| /arch/arm/boot/dts/ti/omap/ |
| D | omap3430-sdp.dts | 63 gpmc,cs-on-ns = <0>;
64 gpmc,cs-rd-off-ns = <186>;
65 gpmc,cs-wr-off-ns = <186>;
113 gpmc,cs-on-ns = <0>;
114 gpmc,cs-rd-off-ns = <36>;
115 gpmc,cs-wr-off-ns = <36>;
159 gpmc,cs-on-ns = <0>;
160 gpmc,cs-rd-off-ns = <84>;
161 gpmc,cs-wr-off-ns = <72>;
|
| /arch/x86/kvm/ |
| D | smm.c | 42 CHECK_SMRAM32_OFFSET(cs, 0xFF90); in check_smram_offsets()
62 CHECK_SMRAM64_OFFSET(cs, 0xFE10); in check_smram_offsets()
215 enter_smm_save_seg_32(vcpu, &smram->cs, &smram->cs_sel, VCPU_SREG_CS); in enter_smm_save_state_32()
271 enter_smm_save_seg_64(vcpu, &smram->cs, VCPU_SREG_CS); in enter_smm_save_state_64()
283 struct kvm_segment cs, ds; in enter_smm() local
338 cs.selector = (vcpu->arch.smbase >> 4) & 0xffff; in enter_smm()
339 cs.base = vcpu->arch.smbase; in enter_smm()
344 cs.limit = ds.limit = 0xffffffff; in enter_smm()
345 cs.type = ds.type = 0x3; in enter_smm()
346 cs.dpl = ds.dpl = 0; in enter_smm()
[all …]
|
| /arch/riscv/boot/dts/canaan/ |
| D | canaan_kd233.dts | 64 pinmux = <K210_FPIOA(6, K210_PCF_GPIOHS20)>, /* cs */
95 <K210_FPIOA(32, K210_PCF_GPIOHS16)>; /* cs */
126 num-cs = <1>;
127 cs-gpios = <&gpio0 20 GPIO_ACTIVE_HIGH>;
141 num-cs = <1>;
142 cs-gpios = <&gpio0 16 GPIO_ACTIVE_LOW>;
|
| D | sipeed_maix_bit.dts | 118 pinmux = <K210_FPIOA(36, K210_PCF_GPIOHS20)>, /* cs */
128 <K210_FPIOA(29, K210_PCF_GPIOHS13)>; /* cs */
171 num-cs = <1>;
172 cs-gpios = <&gpio0 20 GPIO_ACTIVE_HIGH>;
180 spi-cs-high;
188 num-cs = <1>;
189 cs-gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
|
| /arch/powerpc/boot/ |
| D | cuboot-pq2.c | 81 int cs = cs_ranges_buf[i].csnum; in update_cs_ranges() local
82 if (cs >= ctrl_size / 8) in update_cs_ranges()
88 base = in_be32(&ctrl_addr[cs * 2]); in update_cs_ranges()
95 option = in_be32(&ctrl_addr[cs * 2 + 1]) & 0x7fff; in update_cs_ranges()
101 out_be32(&ctrl_addr[cs * 2], 0); in update_cs_ranges()
102 out_be32(&ctrl_addr[cs * 2 + 1], in update_cs_ranges()
104 out_be32(&ctrl_addr[cs * 2], base | cs_ranges_buf[i].addr); in update_cs_ranges()
|