/arch/sh/kernel/cpu/sh2/ |
D | probe.c | 34 boot_cpu_data.dcache.ways = 4; in cpu_probe() 35 boot_cpu_data.dcache.way_incr = (1<<12); in cpu_probe() 36 boot_cpu_data.dcache.sets = 256; in cpu_probe() 37 boot_cpu_data.dcache.entry_shift = 4; in cpu_probe() 38 boot_cpu_data.dcache.linesz = L1_CACHE_BYTES; in cpu_probe() 39 boot_cpu_data.dcache.flags = 0; in cpu_probe() 56 boot_cpu_data.dcache.ways = 1; in cpu_probe() 57 boot_cpu_data.dcache.sets = 256; in cpu_probe() 58 boot_cpu_data.dcache.entry_shift = 5; in cpu_probe() 59 boot_cpu_data.dcache.linesz = 32; in cpu_probe() [all …]
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/arch/mips/mm/ |
D | c-octeon.c | 189 c->dcache.linesz = 128; in probe_octeon() 191 c->dcache.sets = 2; /* CN5XXX has two Dcache sets */ in probe_octeon() 193 c->dcache.sets = 1; /* CN3XXX has one Dcache set */ in probe_octeon() 194 c->dcache.ways = 64; in probe_octeon() 196 c->dcache.sets * c->dcache.ways * c->dcache.linesz; in probe_octeon() 197 c->dcache.waybit = ffs(dcache_size / c->dcache.ways) - 1; in probe_octeon() 208 c->dcache.linesz = 128; in probe_octeon() 209 c->dcache.ways = 32; in probe_octeon() 210 c->dcache.sets = 8; in probe_octeon() 211 dcache_size = c->dcache.sets * c->dcache.ways * c->dcache.linesz; in probe_octeon() [all …]
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D | c-r4k.c | 1014 c->dcache.linesz = 16 << ((config & CONF_DB) >> 4); in probe_pcache() 1015 c->dcache.ways = 2; in probe_pcache() 1016 c->dcache.waybit= __ffs(dcache_size/2); in probe_pcache() 1028 c->dcache.linesz = 16 << ((config & CONF_DB) >> 4); in probe_pcache() 1029 c->dcache.ways = 2; in probe_pcache() 1030 c->dcache.waybit = 0; in probe_pcache() 1042 c->dcache.linesz = 16 << ((config & CONF_DB) >> 4); in probe_pcache() 1043 c->dcache.ways = 4; in probe_pcache() 1044 c->dcache.waybit = 0; in probe_pcache() 1063 c->dcache.linesz = 16 << ((config & CONF_DB) >> 4); in probe_pcache() [all …]
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/arch/sh/kernel/cpu/sh3/ |
D | probe.c | 50 boot_cpu_data.dcache.ways = 4; in cpu_probe() 51 boot_cpu_data.dcache.entry_shift = 4; in cpu_probe() 52 boot_cpu_data.dcache.linesz = L1_CACHE_BYTES; in cpu_probe() 53 boot_cpu_data.dcache.flags = 0; in cpu_probe() 60 boot_cpu_data.dcache.way_incr = (1 << 11); in cpu_probe() 61 boot_cpu_data.dcache.entry_mask = 0x7f0; in cpu_probe() 62 boot_cpu_data.dcache.sets = 128; in cpu_probe() 67 boot_cpu_data.dcache.way_incr = (1 << 12); in cpu_probe() 68 boot_cpu_data.dcache.entry_mask = 0xff0; in cpu_probe() 69 boot_cpu_data.dcache.sets = 256; in cpu_probe() [all …]
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/arch/sh/kernel/cpu/ |
D | init.c | 128 waysize = current_cpu_data.dcache.sets; in cache_init() 139 waysize <<= current_cpu_data.dcache.entry_shift; in cache_init() 147 ways = current_cpu_data.dcache.ways; in cache_init() 155 addr += current_cpu_data.dcache.linesz) in cache_init() 158 addrstart += current_cpu_data.dcache.way_incr; in cache_init() 170 if (current_cpu_data.dcache.ways > 1) in cache_init() 204 l1d_cache_shape = CACHE_DESC_SHAPE(current_cpu_data.dcache); in detect_cache_shape() 206 if (current_cpu_data.dcache.flags & SH_CACHE_COMBINED) in detect_cache_shape() 313 current_cpu_data.dcache.entry_mask = current_cpu_data.dcache.way_incr - in cpu_init() 314 current_cpu_data.dcache.linesz; in cpu_init() [all …]
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/arch/sh/kernel/cpu/sh2a/ |
D | probe.c | 43 boot_cpu_data.dcache.ways = 4; in cpu_probe() 44 boot_cpu_data.dcache.way_incr = (1 << 11); in cpu_probe() 45 boot_cpu_data.dcache.sets = 128; in cpu_probe() 46 boot_cpu_data.dcache.entry_shift = 4; in cpu_probe() 47 boot_cpu_data.dcache.linesz = L1_CACHE_BYTES; in cpu_probe() 48 boot_cpu_data.dcache.flags = 0; in cpu_probe() 56 boot_cpu_data.icache = boot_cpu_data.dcache; in cpu_probe()
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/arch/sh/mm/ |
D | cache-sh7705.c | 35 ways = current_cpu_data.dcache.ways; in cache_wback_all() 36 waysize = current_cpu_data.dcache.sets; in cache_wback_all() 37 waysize <<= current_cpu_data.dcache.entry_shift; in cache_wback_all() 46 addr += current_cpu_data.dcache.linesz) { in cache_wback_all() 57 addrstart += current_cpu_data.dcache.way_incr; in cache_wback_all() 103 ways = current_cpu_data.dcache.ways; in __flush_dcache_page() 104 waysize = current_cpu_data.dcache.sets; in __flush_dcache_page() 105 waysize <<= current_cpu_data.dcache.entry_shift; in __flush_dcache_page() 114 addr += current_cpu_data.dcache.linesz) { in __flush_dcache_page() 124 addrstart += current_cpu_data.dcache.way_incr; in __flush_dcache_page()
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D | cache.c | 66 if (boot_cpu_data.dcache.n_aliases && folio_mapped(folio) && in copy_to_user_page() 73 if (boot_cpu_data.dcache.n_aliases) in copy_to_user_page() 87 if (boot_cpu_data.dcache.n_aliases && page_mapcount(page) && in copy_from_user_page() 94 if (boot_cpu_data.dcache.n_aliases) in copy_from_user_page() 107 if (boot_cpu_data.dcache.n_aliases && folio_mapped(src) && in copy_user_highpage() 146 if (!boot_cpu_data.dcache.n_aliases) in __update_cache() 164 if (boot_cpu_data.dcache.n_aliases && folio_mapped(folio) && in __flush_anon_page() 186 if (boot_cpu_data.dcache.n_aliases == 0) in flush_cache_mm() 194 if (boot_cpu_data.dcache.n_aliases == 0) in flush_cache_dup_mm() 276 boot_cpu_data.dcache.ways, in emit_cache_params() [all …]
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D | cache-sh4.c | 164 (current_cpu_data.dcache.sets << in flush_dcache_all() 165 current_cpu_data.dcache.entry_shift) * in flush_dcache_all() 166 current_cpu_data.dcache.ways; in flush_dcache_all() 168 entry_offset = 1 << current_cpu_data.dcache.entry_shift; in flush_dcache_all() 248 map_coherent = (current_cpu_data.dcache.n_aliases && in sh4_flush_cache_page() 299 if (boot_cpu_data.dcache.n_aliases == 0) in sh4_flush_cache_range() 327 struct cache_info *dcache; in __flush_cache_one() local 332 dcache = &boot_cpu_data.dcache; in __flush_cache_one() 334 way_count = dcache->ways; in __flush_cache_one() 335 way_incr = dcache->way_incr; in __flush_cache_one()
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D | cache-sh3.c | 44 for (j = 0; j < current_cpu_data.dcache.ways; j++) { in sh3__flush_wback_region() 48 addr = addrstart | (v & current_cpu_data.dcache.entry_mask); in sh3__flush_wback_region() 60 addrstart += current_cpu_data.dcache.way_incr; in sh3__flush_wback_region() 85 (v & current_cpu_data.dcache.entry_mask) | SH_CACHE_ASSOC; in sh3__flush_purge_region()
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D | cache-shx3.c | 27 if (boot_cpu_data.dcache.n_aliases || boot_cpu_data.icache.n_aliases) { in shx3_cache_init() 31 boot_cpu_data.dcache.n_aliases = 0; in shx3_cache_init()
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D | cache-sh2a.c | 60 nr_ways = current_cpu_data.dcache.ways; in sh2a__flush_wback_region() 68 end = begin + (nr_ways * current_cpu_data.dcache.way_size); in sh2a__flush_wback_region() 107 int nr_ways = current_cpu_data.dcache.ways; in sh2a__flush_purge_region()
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D | cache-debugfs.c | 49 cache = ¤t_cpu_data.dcache; in cache_debugfs_show()
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/arch/sh/kernel/cpu/sh4/ |
D | probe.c | 44 boot_cpu_data.dcache.way_incr = (1 << 14); in cpu_probe() 45 boot_cpu_data.dcache.entry_shift = 5; in cpu_probe() 46 boot_cpu_data.dcache.sets = 512; in cpu_probe() 47 boot_cpu_data.dcache.ways = 1; in cpu_probe() 48 boot_cpu_data.dcache.linesz = L1_CACHE_BYTES; in cpu_probe() 68 boot_cpu_data.dcache.ways = 4; in cpu_probe() 172 boot_cpu_data.dcache.ways = 2; in cpu_probe() 177 boot_cpu_data.dcache.ways = 2; in cpu_probe() 193 boot_cpu_data.dcache.ways = 2; in cpu_probe() 210 if (boot_cpu_data.dcache.ways > 1) { in cpu_probe() [all …]
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/arch/mips/include/asm/ |
D | r4kcache.h | 240 __BUILD_BLAST_CACHE(d, dcache, Index_Writeback_Inv_D, Hit_Writeback_Inv_D, 16, ) 243 __BUILD_BLAST_CACHE(d, dcache, Index_Writeback_Inv_D, Hit_Writeback_Inv_D, 32, ) 247 __BUILD_BLAST_CACHE(d, dcache, Index_Writeback_Inv_D, Hit_Writeback_Inv_D, 64, ) 250 __BUILD_BLAST_CACHE(d, dcache, Index_Writeback_Inv_D, Hit_Writeback_Inv_D, 128, ) 254 __BUILD_BLAST_CACHE(inv_d, dcache, Index_Writeback_Inv_D, Hit_Invalidate_D, 16, ) 255 __BUILD_BLAST_CACHE(inv_d, dcache, Index_Writeback_Inv_D, Hit_Invalidate_D, 32, ) 273 __BUILD_BLAST_USER_CACHE(d, dcache, Index_Writeback_Inv_D, Hit_Writeback_Inv_D, 276 __BUILD_BLAST_USER_CACHE(d, dcache, Index_Writeback_Inv_D, Hit_Writeback_Inv_D, 279 __BUILD_BLAST_USER_CACHE(d, dcache, Index_Writeback_Inv_D, Hit_Writeback_Inv_D, 300 __BUILD_BLAST_CACHE_RANGE(d, dcache, Hit_Writeback_Inv_D, protected_, ) [all …]
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/arch/mips/kernel/ |
D | cacheinfo.c | 30 if (c->dcache.waysize) in init_cache_level() 87 populate_cache(dcache, this_leaf, level, CACHE_TYPE_DATA); in populate_cache_leaves() 92 populate_cache(dcache, this_leaf, level, CACHE_TYPE_UNIFIED); in populate_cache_leaves()
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/arch/powerpc/perf/ |
D | power8-pmu.c | 133 CACHE_EVENT_ATTR(L1-dcache-load-misses, PM_LD_MISS_L1); 134 CACHE_EVENT_ATTR(L1-dcache-loads, PM_LD_REF_L1); 136 CACHE_EVENT_ATTR(L1-dcache-prefetches, PM_L1_PREF); 137 CACHE_EVENT_ATTR(L1-dcache-store-misses, PM_ST_MISS_L1);
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D | power9-pmu.c | 177 CACHE_EVENT_ATTR(L1-dcache-load-misses, PM_LD_MISS_L1_FIN); 178 CACHE_EVENT_ATTR(L1-dcache-loads, PM_LD_REF_L1); 179 CACHE_EVENT_ATTR(L1-dcache-prefetches, PM_L1_PREF); 180 CACHE_EVENT_ATTR(L1-dcache-store-misses, PM_ST_MISS_L1);
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D | power10-pmu.c | 133 CACHE_EVENT_ATTR(L1-dcache-load-misses, PM_LD_MISS_L1); 134 CACHE_EVENT_ATTR(L1-dcache-loads, PM_LD_REF_L1); 135 CACHE_EVENT_ATTR(L1-dcache-prefetches, PM_LD_PREFETCH_CACHE_LINE_MISS); 136 CACHE_EVENT_ATTR(L1-dcache-store-misses, PM_ST_MISS_L1);
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D | generic-compat-pmu.c | 109 CACHE_EVENT_ATTR(L1-dcache-load-misses, PM_LD_MISS_L1); 110 CACHE_EVENT_ATTR(L1-dcache-store-misses, PM_ST_MISS_L1);
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/arch/microblaze/boot/dts/ |
D | system.dts | 54 xlnx,allow-dcache-wr = <0x1>; 62 xlnx,dcache-addr-tag = <0xf>; 63 xlnx,dcache-always-used = <0x1>; 64 xlnx,dcache-byte-size = <0x2000>; 65 xlnx,dcache-line-len = <0x4>; 66 xlnx,dcache-use-fsl = <0x1>; 104 xlnx,use-dcache = <0x1>;
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/arch/powerpc/kernel/ |
D | cacheinfo.c | 372 struct cache *dcache, *icache; in cache_do_one_devnode_split() local 377 dcache = new_cache(CACHE_TYPE_DATA, level, node, group_id); in cache_do_one_devnode_split() 380 if (!dcache || !icache) in cache_do_one_devnode_split() 383 dcache->next_local = icache; in cache_do_one_devnode_split() 385 return dcache; in cache_do_one_devnode_split() 387 release_cache(dcache); in cache_do_one_devnode_split()
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/arch/nios2/boot/dts/ |
D | 3c120_devboard.dts | 27 dcache-line-size = <32>; 29 dcache-size = <32768>;
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D | 10m50_devboard.dts | 37 dcache-line-size = <32>; 38 dcache-size = <32768>;
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/arch/sh/include/asm/ |
D | cacheflush.h | 70 if (boot_cpu_data.dcache.n_aliases && PageAnon(page)) in flush_anon_page()
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