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Searched refs:f0 (Results 1 – 25 of 74) sorted by relevance

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/arch/sparc/kernel/
Dfpu_traps.S32 fzero %f0
36 faddd %f0, %f2, %f4
37 fmuld %f0, %f2, %f6
38 faddd %f0, %f2, %f8
39 fmuld %f0, %f2, %f10
40 faddd %f0, %f2, %f12
41 fmuld %f0, %f2, %f14
42 faddd %f0, %f2, %f16
43 fmuld %f0, %f2, %f18
44 faddd %f0, %f2, %f20
[all …]
/arch/sparc/crypto/
Dcamellia_asm.S36 ld [%o0 + 0x00], %f0 ! i0, k[0]
40 std %f0, [%o1 + 0x00] ! k[0, 1]
41 fsrc2 %f0, %f28
47 ld [%o0 + 0x10], %f0
49 std %f0, [%o1 + 0x20] ! k[8, 9]
53 fxor %f10, %f0, %f2
58 fxor %f28, %f0, %f0
72 fxor %f28, %f0, %f0
89 std %f0, [%o1 + 0x10] ! k[ 4, 5]
136 std %f0, [%o1 + 0x30] ! k[12, 13]
[all …]
Ddes_asm.S11 ld [%o0 + 0x00], %f0
29 std %f0, [%o1 + 0x00]
54 ldd [%o0 + 0x00], %f0
89 ldd [%o0 + 0x00], %f0
187 ldd [%o0 + 0x00], %f0
205 ldd [%o0 + 0x80], %f0
231 ldd [%o0 + 0x100], %f0
275 ldd [%o0 + 0x00], %f0
329 ldd [%o0 + 0x130], %f0; \
358 ldd [%o0 + 0x00], %f0; \
Dsha1_asm.S10 ld [%o0 + 0x00], %f0
35 st %f0, [%o0 + 0x00]
Dmd5_asm.S10 ld [%o0 + 0x00], %f0
34 st %f0, [%o0 + 0x00]
Dsha256_asm.S10 ld [%o0 + 0x00], %f0
38 st %f0, [%o0 + 0x00]
Dsha512_asm.S10 ldd [%o0 + 0x00], %f0
46 std %f0, [%o0 + 0x00]
/arch/ia64/lib/
Dclear_page.S47 .fetch: stf.spill.nta [dst_fetch] = f0, L3_LINE_SIZE
57 1: stf.spill.nta [dst1] = f0, 64
58 stf.spill.nta [dst2] = f0, 64
63 1: stf.spill.nta [dst1] = f0, 64
64 stf.spill.nta [dst2] = f0, 64
65 stf.spill.nta [dst3] = f0, 64
66 stf.spill.nta [dst4] = f0, 128
69 stf.spill.nta [dst1] = f0, 64
70 stf.spill.nta [dst2] = f0, 64
72 stf.spill.nta [dst3] = f0, 64
[all …]
Dmemset.S220 stf.spill [ptr9] = f0, 128 // Do stores one cache line apart
230 stf.spill [ptr2] = f0, 32
231 stf.spill [ptr0] = f0, 32
234 stf.spill [ptr2] = f0, 32
235 stf.spill [ptr0] = f0, 32
238 stf.spill [ptr2] = f0, 32
239 stf.spill [ptr0] = f0, 64
243 stf.spill [ptr2] = f0, 32
244 (p_scr) stf.spill [ptr9] = f0, 128
/arch/sparc/lib/
Dclear_page.S79 fzero %f0
84 faddd %f0, %f2, %f4
85 fmuld %f0, %f2, %f6
86 faddd %f0, %f2, %f8
87 fmuld %f0, %f2, %f10
89 faddd %f0, %f2, %f12
90 fmuld %f0, %f2, %f14
91 1: stda %f0, [%o0 + %g0] ASI_BLK_P
DU1memcpy.S89 MAIN_LOOP_CHUNK(src, dest, f0, f48, branch_dest)
107 #define FINISH_VISCHUNK(dest, f0, f1) \ argument
110 faligndata %f0, %f1, %f48; \
114 #define UNEVEN_VISCHUNK_LAST(dest, f0, f1) \ argument
117 fsrc2 %f0, %f1;
119 #define UNEVEN_VISCHUNK(dest, f0, f1) \ argument
120 UNEVEN_VISCHUNK_LAST(dest, f0, f1) \
300 faligndata %f4, %f6, %f0
301 EX_ST_FP(STORE(std, %f0, %o0), U1_g2_8_fp)
308 faligndata %f6, %f4, %f0
[all …]
DNG2memcpy.S87 faligndata %x0, %x1, %f0; \
97 fsrc2 %x0, %f0;
99 fsrc2 %x0, %f0; \
102 fsrc2 %x0, %f0; \
106 fsrc2 %x0, %f0; \
111 fsrc2 %x0, %f0; \
117 fsrc2 %x0, %f0; \
124 fsrc2 %x0, %f0; \
132 fsrc2 %x0, %f0; \
350 EX_LD_FP(LOAD_BLK(%g2, %f0), NG2_retl_o2_plus_g1)
[all …]
Dcopy_page.S104 ldd [%o1 + 0x000], %f0
110 fsrc2 %f0, %f16
121 ldd [%o1 + 0x040], %f0
128 fsrc2 %f0, %f16
137 ldd [%o1 + 0x080], %f0
151 fsrc2 %f0, %f16
179 1: ldda [%o1] ASI_BLK_P, %f0
184 1: TOUCH(f0, f2, f4, f6, f8, f10, f12, f14)
191 ldda [%o1] ASI_BLK_P, %f0
205 TOUCH(f0, f2, f4, f6, f8, f10, f12, f14)
[all …]
DU3memcpy.S231 faligndata %f4, %f6, %f0
232 EX_ST_FP(STORE(std, %f0, %o0), U3_retl_o2_plus_g2_plus_8)
250 EX_LD_FP(LOAD(ldd, %o1 + 0x000, %f0), U3_retl_o2)
256 faligndata %f0, %f2, %f16
268 EX_LD_FP(LOAD(ldd, %o1 + 0x040, %f0), U3_retl_o2)
282 faligndata %f14, %f0, %f30
285 faligndata %f0, %f2, %f16
298 EX_LD_FP(LOAD(ldd, %o1 + 0x040, %f0), U3_retl_o2_plus_o3_sll_6_plus_0x80)
309 faligndata %f14, %f0, %f30
312 faligndata %f0, %f2, %f16
[all …]
Dxor.S39 ldda [%o1] %asi, %f0
43 fxor %f0, %f16, %f16
53 ldda [%o1 + 128] %asi, %f0
70 fxor %f0, %f16, %f16
109 ldda [%o1] %asi, %f0
113 fxor %f0, %f16, %f48
123 ldda [%o1] %asi, %f0
139 fxor %f0, %f16, %f48
176 ldda [%o1] %asi, %f0
180 fxor %f0, %f16, %f16
[all …]
/arch/x86/boot/
Dcpuflags.c49 unsigned long f0, f1; in has_eflag() local
61 : "=&r" (f0), "=&r" (f1) in has_eflag()
64 return !!((f0^f1) & mask); in has_eflag()
/arch/ia64/kernel/
Dhead.S763 stf.spill [sp]=f0 // M3
764 mov f32=f0 // F
769 mov f37=f0 // F
774 mov f40=f0 // F
778 mov f45=f0 // F
782 mov f48=f0 // F
786 mov f53=f0 // F
790 mov f56=f0 // F
794 mov f61=f0 // F
798 mov f64=f0 // F
[all …]
Dentry.S77 stf.spill [sp]=f0
89 mov r4=0; mov f2=f0; mov b1=r0
90 mov r5=0; mov f3=f0; mov b2=r0
91 mov r6=0; mov f4=f0; mov b3=r0
92 mov r7=0; mov f5=f0; mov b4=r0
93 ldf.fill f12=[sp]; mov f13=f0; mov b5=r0
94 ldf.fill f14=[sp]; ldf.fill f15=[sp]; mov f16=f0
95 ldf.fill f17=[sp]; ldf.fill f18=[sp]; mov f19=f0
96 ldf.fill f20=[sp]; ldf.fill f21=[sp]; mov f22=f0
97 ldf.fill f23=[sp]; ldf.fill f24=[sp]; mov f25=f0
[all …]
/arch/mips/include/asm/
Dfpregdef.h23 #define fv0 $f0 /* return value */
62 #define fv0 $f0 /* return value */
Dasmmacro-32.h20 s.d $f0, THREAD_FPR0(\thread)
44 l.d $f0, THREAD_FPR0(\thread)
/arch/mips/kernel/
Dr2300_fpu.S70 EX2(s.d $f0, 0(a0))
104 EX2(l.d $f0, 0(a0))
/arch/riscv/kernel/
Dfpu.S28 fsd f0, TASK_THREAD_F0_F0(a0)
71 fld f0, TASK_THREAD_F0_F0(a0)
/arch/loongarch/include/asm/
Dfpregdef.h10 #define fa0 $f0 /* argument registers, fa0/fa1 reused as fv0/fv1 for return value */
/arch/arm64/boot/dts/qcom/
Dsm7225-fairphone-fp4.dts402 awinic,f0-preset = <2350>;
403 awinic,f0-coefficient = <260>;
404 awinic,f0-calibration-percent = <7>;
407 awinic,f0-detection-play-time = <5>;
408 awinic,f0-detection-wait-time = <3>;
409 awinic,f0-detection-repeat = <2>;
410 awinic,f0-detection-trace = <15>;
/arch/mips/kvm/
Dfpu.S47 1: sdc1 $f0, VCPU_FPR0(a0)
91 1: ldc1 $f0, VCPU_FPR0(a0)

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