/arch/loongarch/include/asm/ |
D | inst.h | 249 unsigned int immediate : 15; member 261 unsigned int immediate : 20; member 281 unsigned int immediate : 5; member 288 unsigned int immediate : 6; member 295 unsigned int immediate : 12; member 302 unsigned int immediate : 14; member 309 unsigned int immediate : 16; member 332 unsigned int immediate : 2; member 420 !is_imm12_negative(ip->reg2i12_format.immediate); in is_ra_save_ins() 429 is_imm12_negative(ip->reg2i12_format.immediate); in is_stack_alloc_ins() [all …]
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/arch/loongarch/kernel/ |
D | relocate.c | 62 insn[0].reg1i20_format.immediate = lu12iw; in relocate_absolute() 63 insn[1].reg2i12_format.immediate = ori; in relocate_absolute() 64 insn[2].reg1i20_format.immediate = lu32id; in relocate_absolute() 65 insn[3].reg2i12_format.immediate = lu52id; in relocate_absolute()
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D | module.c | 182 insn->reg2i12_format.immediate = opr1 & 0xfff; in apply_r_larch_sop_imm_field() 188 insn->reg2i12_format.immediate = opr1 & 0xfff; in apply_r_larch_sop_imm_field() 194 insn->reg2i16_format.immediate = opr1 & 0xffff; in apply_r_larch_sop_imm_field() 203 insn->reg2i16_format.immediate = (opr1 >> 2) & 0xffff; in apply_r_larch_sop_imm_field() 209 insn->reg1i20_format.immediate = (opr1) & 0xfffff; in apply_r_larch_sop_imm_field() 324 insn->reg2i12_format.immediate = v & 0xfff; in apply_r_larch_pcala() 328 insn->reg1i20_format.immediate = v & 0xfffff; in apply_r_larch_pcala() 332 insn->reg1i20_format.immediate = v & 0xfffff; in apply_r_larch_pcala() 336 insn->reg2i12_format.immediate = v & 0xfff; in apply_r_larch_pcala()
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D | ftrace.c | 39 *ra_off = -((1 << 12) - insn->reg2i12_format.immediate); in ftrace_get_parent_ra_addr()
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D | unwind_prologue.c | 145 frame_size = (1 << 12) - ip->reg2i12_format.immediate; in unwind_by_prologue() 165 frame_ra = ip->reg2i12_format.immediate; in unwind_by_prologue()
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D | alternative.c | 107 si = src->reg2i16_format.immediate; in recompute_jump() 121 buf->reg2i16_format.immediate = offset; in recompute_jump()
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D | inst.c | 17 unsigned int imm = insn.reg1i20_format.immediate; in simu_pc() 86 imm = insn.reg2i16_format.immediate; in simu_branch()
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/arch/x86/kernel/kprobes/ |
D | core.c | 631 if (insn->immediate.nbytes == 2) in prepare_emulation() 632 p->ainsn.rel32 = *(s16 *)&insn->immediate.value; in prepare_emulation() 634 p->ainsn.rel32 = *(s32 *)&insn->immediate.value; in prepare_emulation() 639 if (insn->immediate.nbytes == 1) in prepare_emulation() 640 p->ainsn.rel32 = *(s8 *)&insn->immediate.value; in prepare_emulation() 641 else if (insn->immediate.nbytes == 2) in prepare_emulation() 642 p->ainsn.rel32 = *(s16 *)&insn->immediate.value; in prepare_emulation() 644 p->ainsn.rel32 = *(s32 *)&insn->immediate.value; in prepare_emulation() 650 p->ainsn.rel32 = insn->immediate.value; in prepare_emulation() 658 if (insn->immediate.nbytes == 2) in prepare_emulation() [all …]
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D | opt.c | 258 target = (unsigned long)insn->next_byte + insn->immediate.value; in insn_jump_into_range()
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/arch/x86/lib/ |
D | insn.c | 546 insn_field_set(&insn->immediate, get_next(short, insn), 2); in __get_immv32() 550 insn_field_set(&insn->immediate, get_next(int, insn), 4); in __get_immv32() 628 if (insn->immediate.got) in insn_get_immediate() 649 insn_field_set(&insn->immediate, get_next(signed char, insn), 1); in insn_get_immediate() 652 insn_field_set(&insn->immediate, get_next(short, insn), 2); in insn_get_immediate() 655 insn_field_set(&insn->immediate, get_next(int, insn), 4); in insn_get_immediate() 681 insn->immediate.got = 1; in insn_get_immediate() 706 if (!insn->immediate.got) { in insn_get_length() 722 insn->displacement.got && insn->immediate.got; in insn_complete()
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/arch/arc/lib/ |
D | memcpy-700.S | 31 ; uses long immediate 37 ; uses long immediate
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D | strlen.S | 13 ; uses long immediate
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/arch/arm/kernel/ |
D | phys2virt.S | 79 @ second halfword of the opcode (the 16-bit immediate is encoded 88 @ offset into the immediate field of the MOV instruction, or patch it 92 @ needed. The encoding of the immediate is rather complex for values 157 @ immediate field of the opcode, which is emitted with the correct 158 @ rotation value. (The effective value of the immediate is imm12<7:0> 170 @ word, and patch in the high word of the offset into the immediate
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/arch/x86/kernel/ |
D | cfi.c | 45 *type = -(u32)insn.immediate.value; in decode_cfi_insn()
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D | alternative.c | 218 *target = *next + insn->immediate.value; in __optimize_nops() 365 if (need_reloc(next + insn.immediate.value, src, src_len)) { in apply_relocation() 366 apply_reloc(insn.immediate.nbytes, in apply_relocation() 375 s32 imm = insn.immediate.value; in apply_relocation() 590 target = addr + insn->length + insn->immediate.value; in patch_retpoline() 699 addr + insn.length + insn.immediate.value); in apply_retpolines() 762 dest = addr + insn.length + insn.immediate.value; in apply_returns() 772 addr + insn.length + insn.immediate.value); in apply_returns() 2369 tp->disp = insn.immediate.value; in text_poke_loc_init()
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D | uprobes.c | 703 0, insn->immediate.nbytes); in branch_clear_offset() 760 auprobe->branch.offs = insn->immediate.value; in branch_setup_xol_ops()
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D | callthunks.c | 171 dest = addr + insn.length + insn.immediate.value; in call_get_dest()
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D | sev-shared.c | 748 port = (u8)insn->immediate.value & 0xffff; in vc_ioio_exitinfo() 755 port = (u8)insn->immediate.value & 0xffff; in vc_ioio_exitinfo()
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/arch/arm/mm/ |
D | abort-lv4t.S | 91 and r9, r8, #0x00f @ get Rm / low nibble of immediate value 92 tst r8, #1 << 22 @ if (immediate offset) 93 andne r6, r8, #0xf00 @ { immediate high nibble
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/arch/openrisc/ |
D | Kconfig | 148 bool "Have instruction l.rori for rotate right with immediate" 156 l.rori rotate right with immediate instruction.
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/arch/x86/include/asm/ |
D | insn.h | 84 struct insn_field immediate; member
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/arch/m68k/math-emu/ |
D | fp_scan.S | 197 | all pc relative addressing modes and immediate/absolute modes end up here 221 | addressing mode: immediate data
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/arch/m68k/ifpsp060/src/ |
D | isp.S | 900 # #<data> - return address of immediate value; set immed_flg # 996 short immediate - tbl_ea_mode 1376 immediate: 1377 mov.b &immed_flg,SPCOND_FLG(%a6) # set immediate flag
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D | pfpsp.S | 2381 # _mem_read() - read extended immediate operand from memory # 2402 # (1) FP Instructions using extended precision or packed immediate # 2407 # For immediate data operations, the data is read in w/ a # 2614 # INEX1 : all packed immediate operations 2947 # immediate operands but requires some extra work for fmovm dynamic 2965 # instruction is using an extended precision immediate operand. Therefore, 3869 # 3) #<data> : The upper longword of the immediate operand is # 3899 # need to set immediate data flag here since we'll need to do
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/arch/x86/coco/tdx/ |
D | tdx.c | 430 val = insn.immediate.value; in handle_mmio()
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