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Searched refs:mpidr (Results 1 – 25 of 33) sorted by relevance

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/arch/arm/mach-milbeaut/
Dplatsmp.c25 unsigned int mpidr, cpu, cluster; in m10v_boot_secondary() local
30 mpidr = cpu_logical_map(l_cpu); in m10v_boot_secondary()
31 cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0); in m10v_boot_secondary()
32 cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1); in m10v_boot_secondary()
48 unsigned int mpidr, cpu, cluster; in m10v_smp_init() local
59 mpidr = read_cpuid_mpidr(); in m10v_smp_init()
60 cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0); in m10v_smp_init()
61 cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1); in m10v_smp_init()
78 unsigned int mpidr, cpu; in m10v_cpu_kill() local
80 mpidr = cpu_logical_map(l_cpu); in m10v_cpu_kill()
[all …]
/arch/arm/common/
Dmcpm_platsmp.c22 unsigned int mpidr; in cpu_to_pcpu() local
24 mpidr = cpu_logical_map(cpu); in cpu_to_pcpu()
25 *pcpu = MPIDR_AFFINITY_LEVEL(mpidr, 0); in cpu_to_pcpu()
26 *pcluster = MPIDR_AFFINITY_LEVEL(mpidr, 1); in cpu_to_pcpu()
73 unsigned int mpidr, pcpu, pcluster; in mcpm_cpu_die() local
74 mpidr = read_cpuid_mpidr(); in mcpm_cpu_die()
75 pcpu = MPIDR_AFFINITY_LEVEL(mpidr, 0); in mcpm_cpu_die()
76 pcluster = MPIDR_AFFINITY_LEVEL(mpidr, 1); in mcpm_cpu_die()
Dmcpm_entry.c241 unsigned int mpidr, cpu, cluster; in mcpm_cpu_power_down() local
245 mpidr = read_cpuid_mpidr(); in mcpm_cpu_power_down()
246 cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0); in mcpm_cpu_power_down()
247 cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1); in mcpm_cpu_power_down()
330 unsigned int mpidr = read_cpuid_mpidr(); in mcpm_cpu_suspend() local
331 unsigned int cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0); in mcpm_cpu_suspend()
332 unsigned int cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1); in mcpm_cpu_suspend()
342 unsigned int mpidr, cpu, cluster; in mcpm_cpu_powered_up() local
349 mpidr = read_cpuid_mpidr(); in mcpm_cpu_powered_up()
350 cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0); in mcpm_cpu_powered_up()
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DbL_switcher.c124 unsigned int mpidr = read_mpidr(); in bL_switchpoint() local
125 unsigned int clusterid = MPIDR_AFFINITY_LEVEL(mpidr, 1); in bL_switchpoint()
149 unsigned int mpidr, this_cpu, that_cpu; in bL_switch_to() local
236 mpidr = read_mpidr(); in bL_switch_to()
237 pr_debug("after switch: CPU %d MPIDR %#x\n", this_cpu, mpidr); in bL_switch_to()
238 BUG_ON(mpidr != ib_mpidr); in bL_switch_to()
515 int bL_switcher_get_logical_index(u32 mpidr) in bL_switcher_get_logical_index() argument
522 mpidr &= MPIDR_HWID_BITMASK; in bL_switcher_get_logical_index()
527 if ((mpidr == cpu_logical_map(cpu)) || in bL_switcher_get_logical_index()
528 (mpidr == cpu_logical_map(pairing))) in bL_switcher_get_logical_index()
/arch/arm/kernel/
Dtopology.c188 unsigned int mpidr; in store_cpu_topology() local
193 mpidr = read_cpuid_mpidr(); in store_cpu_topology()
196 if ((mpidr & MPIDR_SMP_BITMASK) == MPIDR_SMP_VALUE) { in store_cpu_topology()
202 if (mpidr & MPIDR_MT_BITMASK) { in store_cpu_topology()
204 cpuid_topo->thread_id = MPIDR_AFFINITY_LEVEL(mpidr, 0); in store_cpu_topology()
205 cpuid_topo->core_id = MPIDR_AFFINITY_LEVEL(mpidr, 1); in store_cpu_topology()
206 cpuid_topo->package_id = MPIDR_AFFINITY_LEVEL(mpidr, 2); in store_cpu_topology()
210 cpuid_topo->core_id = MPIDR_AFFINITY_LEVEL(mpidr, 0); in store_cpu_topology()
211 cpuid_topo->package_id = MPIDR_AFFINITY_LEVEL(mpidr, 1); in store_cpu_topology()
229 cpu_topology[cpuid].package_id, mpidr); in store_cpu_topology()
Dsleep.S38 .macro compute_mpidr_hash dst, rs0, rs1, rs2, mpidr, mask
39 and \mpidr, \mpidr, \mask @ mask out MPIDR bits
40 and \dst, \mpidr, #0xff @ mask=aff0
43 and \mask, \mpidr, #0xff00 @ mask = aff1
47 and \mask, \mpidr, #0xff0000 @ mask = aff2
85 ldmia r0, {r1, r6-r8} @ r1 = mpidr mask (r6,r7,r8) = l[0,1,2] shifts
Ddevtree.c77 u32 mpidr = is_smp() ? read_cpuid_mpidr() & MPIDR_HWID_BITMASK : 0; in arm_dt_init_cpu_maps() local
123 if (hwid == mpidr) { in arm_dt_init_cpu_maps()
/arch/arm/mach-hisi/
Dplatmcpm.c100 unsigned int mpidr, cpu, cluster; in hip04_boot_secondary() local
104 mpidr = cpu_logical_map(l_cpu); in hip04_boot_secondary()
105 cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0); in hip04_boot_secondary()
106 cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1); in hip04_boot_secondary()
155 unsigned int mpidr, cpu, cluster; in hip04_cpu_die() local
158 mpidr = cpu_logical_map(l_cpu); in hip04_cpu_die()
159 cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0); in hip04_cpu_die()
160 cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1); in hip04_cpu_die()
193 unsigned int mpidr, cpu, cluster; in hip04_cpu_kill() local
196 mpidr = cpu_logical_map(l_cpu); in hip04_cpu_kill()
[all …]
/arch/arm64/kernel/
Dsleep.S39 .macro compute_mpidr_hash dst, rs0, rs1, rs2, rs3, mpidr, mask
40 and \mpidr, \mpidr, \mask // mask out MPIDR bits
41 and \dst, \mpidr, #0xff // mask=aff0
43 and \mask, \mpidr, #0xff00 // mask = aff1
46 and \mask, \mpidr, #0xff0000 // mask = aff2
49 and \mask, \mpidr, #0xff00000000 // mask = aff3
Dsetup.c94 u64 mpidr = read_cpuid_mpidr() & MPIDR_HWID_BITMASK; in smp_setup_processor_id() local
95 set_cpu_logical_map(0, mpidr); in smp_setup_processor_id()
98 (unsigned long)mpidr, read_cpuid_id()); in smp_setup_processor_id()
/arch/arm/mach-sunxi/
Dmc_smp.c393 unsigned int mpidr, cpu, cluster; in sunxi_mc_smp_boot_secondary() local
395 mpidr = cpu_logical_map(l_cpu); in sunxi_mc_smp_boot_secondary()
396 cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0); in sunxi_mc_smp_boot_secondary()
397 cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1); in sunxi_mc_smp_boot_secondary()
445 unsigned int mpidr, cpu, cluster; in sunxi_mc_smp_cpu_die() local
448 mpidr = cpu_logical_map(l_cpu); in sunxi_mc_smp_cpu_die()
449 cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0); in sunxi_mc_smp_cpu_die()
450 cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1); in sunxi_mc_smp_cpu_die()
535 unsigned int mpidr, cpu, cluster; in sunxi_mc_smp_cpu_kill() local
540 mpidr = cpu_logical_map(l_cpu); in sunxi_mc_smp_cpu_kill()
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/arch/arm/mach-exynos/
Dplatsmp.c51 u32 mpidr = cpu_logical_map(cpu); in platform_do_lowpower() local
52 u32 core_id = MPIDR_AFFINITY_LEVEL(mpidr, 0); in platform_do_lowpower()
320 u32 mpidr = cpu_logical_map(cpu); in exynos_boot_secondary() local
321 u32 core_id = MPIDR_AFFINITY_LEVEL(mpidr, 0); in exynos_boot_secondary()
425 u32 mpidr = cpu_logical_map(cpu); in exynos_cpu_die() local
426 u32 core_id = MPIDR_AFFINITY_LEVEL(mpidr, 0); in exynos_cpu_die()
Dsuspend.c268 unsigned int mpidr = read_cpuid_mpidr(); in exynos5420_cpu_suspend() local
269 unsigned int cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1); in exynos5420_cpu_suspend()
270 unsigned int cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0); in exynos5420_cpu_suspend()
454 unsigned int mpidr, cluster; in exynos5420_prepare_pm_resume() local
456 mpidr = read_cpuid_mpidr(); in exynos5420_prepare_pm_resume()
457 cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1); in exynos5420_prepare_pm_resume()
/arch/arm64/include/asm/
Dsmp_plat.h35 static inline int get_logical_index(u64 mpidr) in get_logical_index() argument
39 if (cpu_logical_map(cpu) == mpidr) in get_logical_index()
Dcputype.h21 #define MPIDR_AFFINITY_LEVEL(mpidr, level) \ argument
22 ((mpidr >> MPIDR_LEVEL_SHIFT(level)) & MPIDR_LEVEL_MASK)
/arch/arm/include/asm/
DbL_switcher.h55 int bL_switcher_get_logical_index(u32 mpidr);
71 static inline int bL_switcher_get_logical_index(u32 mpidr) { return -EUNATCH; } in bL_switcher_get_logical_index() argument
Dsmp_plat.h80 static inline int get_logical_index(u32 mpidr) in get_logical_index() argument
84 if (cpu_logical_map(cpu) == mpidr) in get_logical_index()
Dcputype.h62 #define MPIDR_AFFINITY_LEVEL(mpidr, level) \ argument
63 ((mpidr >> (MPIDR_LEVEL_BITS * level)) & MPIDR_LEVEL_MASK)
/arch/arm64/kvm/
Dsys_regs.h227 u64 mpidr; in calculate_mpidr() local
236 mpidr = (vcpu->vcpu_id & 0x0f) << MPIDR_LEVEL_SHIFT(0); in calculate_mpidr()
237 mpidr |= ((vcpu->vcpu_id >> 4) & 0xff) << MPIDR_LEVEL_SHIFT(1); in calculate_mpidr()
238 mpidr |= ((vcpu->vcpu_id >> 12) & 0xff) << MPIDR_LEVEL_SHIFT(2); in calculate_mpidr()
239 mpidr |= (1ULL << 31); in calculate_mpidr()
241 return mpidr; in calculate_mpidr()
Dpsci.c108 unsigned long i, mpidr; in kvm_psci_vcpu_affinity_info() local
134 mpidr = kvm_vcpu_get_mpidr_aff(tmp); in kvm_psci_vcpu_affinity_info()
135 if ((mpidr & target_affinity_mask) == target_affinity) { in kvm_psci_vcpu_affinity_info()
/arch/arm64/kvm/hyp/nvhe/
Dpsci-relay.c98 static unsigned int find_cpu_id(u64 mpidr) in find_cpu_id() argument
103 if (mpidr & ~MPIDR_HWID_BITMASK) in find_cpu_id()
107 if (cpu_logical_map(i) == mpidr) in find_cpu_id()
129 DECLARE_REG(u64, mpidr, host_ctxt, 1); in psci_cpu_on()
145 cpu_id = find_cpu_id(mpidr); in psci_cpu_on()
160 ret = psci_call(func_id, mpidr, in psci_cpu_on()
/arch/arm/mach-versatile/
Dtc2_pm.c202 unsigned int mpidr, cpu, cluster; in tc2_pm_init() local
242 mpidr = read_cpuid_mpidr(); in tc2_pm_init()
243 cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0); in tc2_pm_init()
244 cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1); in tc2_pm_init()
/arch/arm64/kvm/vgic/
Dvgic-mmio-v3.c205 ret = extract_bytes(READ_ONCE(irq->mpidr), addr & 7, len); in vgic_mmio_read_irouter()
231 irq->mpidr = val & GENMASK(23, 0); in vgic_mmio_write_irouter()
232 irq->target_vcpu = kvm_mpidr_to_vcpu(vcpu->kvm, irq->mpidr); in vgic_mmio_write_irouter()
322 unsigned long mpidr = kvm_vcpu_get_mpidr_aff(vcpu); in vgic_mmio_read_v3r_typer() local
326 value = (u64)(mpidr & GENMASK(23, 0)) << 32; in vgic_mmio_read_v3r_typer()
1092 u64 mpidr; in vgic_v3_dispatch_sgi() local
1101 mpidr = SGI_AFFINITY_LEVEL(reg, 3); in vgic_v3_dispatch_sgi()
1102 mpidr |= SGI_AFFINITY_LEVEL(reg, 2); in vgic_v3_dispatch_sgi()
1103 mpidr |= SGI_AFFINITY_LEVEL(reg, 1); in vgic_v3_dispatch_sgi()
1125 level0 = match_mpidr(mpidr, target_cpus, c_vcpu); in vgic_v3_dispatch_sgi()
/arch/arm64/kvm/hyp/include/nvhe/
Dpkvm.h143 struct pkvm_hyp_vcpu *pkvm_mpidr_to_hyp_vcpu(struct pkvm_hyp_vm *vm, u64 mpidr);
/arch/arm/mach-shmobile/
Dheadsmp.S103 add r5, r5, r2 @ array of per-cpu mpidr values

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