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Searched refs:pmc (Results 1 – 25 of 155) sorted by relevance

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/arch/x86/kvm/
Dpmu.c96 static inline void __kvm_perf_overflow(struct kvm_pmc *pmc, bool in_pmi) in __kvm_perf_overflow() argument
98 struct kvm_pmu *pmu = pmc_to_pmu(pmc); in __kvm_perf_overflow()
101 if (pmc->perf_event && pmc->perf_event->attr.precise_ip) { in __kvm_perf_overflow()
116 __set_bit(pmc->idx, (unsigned long *)&pmu->global_status); in __kvm_perf_overflow()
119 if (pmc->intr && !skip_pmi) in __kvm_perf_overflow()
120 kvm_make_request(KVM_REQ_PMI, pmc->vcpu); in __kvm_perf_overflow()
127 struct kvm_pmc *pmc = perf_event->overflow_handler_context; in kvm_perf_overflow() local
134 if (test_and_set_bit(pmc->idx, pmc_to_pmu(pmc)->reprogram_pmi)) in kvm_perf_overflow()
137 __kvm_perf_overflow(pmc, true); in kvm_perf_overflow()
139 kvm_make_request(KVM_REQ_PMU, pmc->vcpu); in kvm_perf_overflow()
[all …]
Dpmu.h9 #define pmc_to_pmu(pmc) (&(pmc)->vcpu->arch.pmu) argument
22 bool (*hw_event_available)(struct kvm_pmc *pmc);
58 static inline u64 pmc_bitmask(struct kvm_pmc *pmc) in pmc_bitmask() argument
60 struct kvm_pmu *pmu = pmc_to_pmu(pmc); in pmc_bitmask()
62 return pmu->counter_bitmask[pmc->type]; in pmc_bitmask()
65 static inline u64 pmc_read_counter(struct kvm_pmc *pmc) in pmc_read_counter() argument
69 counter = pmc->counter; in pmc_read_counter()
70 if (pmc->perf_event && !pmc->is_paused) in pmc_read_counter()
71 counter += perf_event_read_value(pmc->perf_event, in pmc_read_counter()
74 return counter & pmc_bitmask(pmc); in pmc_read_counter()
[all …]
/arch/riscv/kvm/
Dvcpu_pmu.c36 static u64 kvm_pmu_get_sample_period(struct kvm_pmc *pmc) in kvm_pmu_get_sample_period() argument
38 u64 counter_val_mask = GENMASK(pmc->cinfo.width, 0); in kvm_pmu_get_sample_period()
41 if (!pmc->counter_val) in kvm_pmu_get_sample_period()
44 sample_period = (-pmc->counter_val) & counter_val_mask; in kvm_pmu_get_sample_period()
77 static void kvm_pmu_release_perf_event(struct kvm_pmc *pmc) in kvm_pmu_release_perf_event() argument
79 if (pmc->perf_event) { in kvm_pmu_release_perf_event()
80 perf_event_disable(pmc->perf_event); in kvm_pmu_release_perf_event()
81 perf_event_release_kernel(pmc->perf_event); in kvm_pmu_release_perf_event()
82 pmc->perf_event = NULL; in kvm_pmu_release_perf_event()
203 struct kvm_pmc *pmc; in pmu_ctr_read() local
[all …]
/arch/powerpc/perf/
Dppc970-pmu.c147 int pmc, psel, unit, byte, bit; in p970_marked_instr_event() local
150 pmc = (event >> PM_PMC_SH) & PM_PMC_MSK; in p970_marked_instr_event()
152 if (pmc) { in p970_marked_instr_event()
153 if (direct_marked_event[pmc - 1] & (1 << psel)) in p970_marked_instr_event()
156 bit = (pmc <= 4)? pmc - 1: 8 - pmc; in p970_marked_instr_event()
195 int pmc, byte, unit, sh, spcsel; in p970_get_constraint() local
199 pmc = (event >> PM_PMC_SH) & PM_PMC_MSK; in p970_get_constraint()
200 if (pmc) { in p970_get_constraint()
201 if (pmc > 8) in p970_get_constraint()
203 sh = (pmc - 1) * 2; in p970_get_constraint()
[all …]
Dpower7-pmu.c86 int pmc, sh, unit; in power7_get_constraint() local
89 pmc = (event >> PM_PMC_SH) & PM_PMC_MSK; in power7_get_constraint()
90 if (pmc) { in power7_get_constraint()
91 if (pmc > 6) in power7_get_constraint()
93 sh = (pmc - 1) * 2; in power7_get_constraint()
96 if (pmc >= 5 && !(event == 0x500fa || event == 0x600f4)) in power7_get_constraint()
99 if (pmc < 5) { in power7_get_constraint()
146 int pmc, psel; in find_alternative_decode() local
149 pmc = (event >> PM_PMC_SH) & PM_PMC_MSK; in find_alternative_decode()
151 if ((pmc == 2 || pmc == 4) && (psel & ~7) == 0x40) in find_alternative_decode()
[all …]
Dpower6-pmu.c139 int pmc, psel, ptype; in power6_marked_instr_event() local
143 pmc = (event >> PM_PMC_SH) & PM_PMC_MSK; in power6_marked_instr_event()
145 if (pmc >= 5) in power6_marked_instr_event()
151 if (pmc == 0 || !(ptype & (1 << (pmc - 1)))) in power6_marked_instr_event()
159 bit = ptype ^ (pmc - 1); in power6_marked_instr_event()
182 unsigned int pmc, ev, b, u, s, psel; in p6_compute_mmcr() local
189 pmc = (event[i] >> PM_PMC_SH) & PM_PMC_MSK; in p6_compute_mmcr()
190 if (pmc) { in p6_compute_mmcr()
191 if (pmc_inuse & (1 << (pmc - 1))) in p6_compute_mmcr()
193 pmc_inuse |= 1 << (pmc - 1); in p6_compute_mmcr()
[all …]
Dpower5-pmu.c141 int pmc, byte, unit, sh; in power5_get_constraint() local
146 pmc = (event >> PM_PMC_SH) & PM_PMC_MSK; in power5_get_constraint()
147 if (pmc) { in power5_get_constraint()
148 if (pmc > 6) in power5_get_constraint()
150 sh = (pmc - 1) * 2; in power5_get_constraint()
153 if (pmc <= 4) in power5_get_constraint()
154 grp = (pmc - 1) >> 1; in power5_get_constraint()
186 if (!pmc) in power5_get_constraint()
201 if (pmc < 5) { in power5_get_constraint()
253 int pmc, altpmc, pp, j; in find_alternative_bdecode() local
[all …]
Dpower5+-pmu.c137 int pmc, byte, unit, sh; in power5p_get_constraint() local
141 pmc = (event >> PM_PMC_SH) & PM_PMC_MSK; in power5p_get_constraint()
142 if (pmc) { in power5p_get_constraint()
143 if (pmc > 6) in power5p_get_constraint()
145 sh = (pmc - 1) * 2; in power5p_get_constraint()
148 if (pmc >= 5 && !(event == 0x500009 || event == 0x600005)) in power5p_get_constraint()
179 if (pmc < 5) { in power5p_get_constraint()
191 int pmc = (event >> PM_PMC_SH) & PM_PMC_MSK; in power5p_limited_pmc_event() local
193 return pmc == 5 || pmc == 6; in power5p_limited_pmc_event()
245 int pmc, altpmc, pp, j; in find_alternative_bdecode() local
[all …]
Disa207-common.h200 #define CNST_PMC_SHIFT(pmc) ((pmc - 1) * 2) argument
201 #define CNST_PMC_VAL(pmc) (1 << CNST_PMC_SHIFT(pmc)) argument
202 #define CNST_PMC_MASK(pmc) (2 << CNST_PMC_SHIFT(pmc)) argument
210 #define MMCR1_UNIT_SHIFT(pmc) (60 - (4 * ((pmc) - 1))) argument
211 #define MMCR1_COMBINE_SHIFT(pmc) (35 - ((pmc) - 1)) argument
212 #define MMCR1_PMCSEL_SHIFT(pmc) (24 - (((pmc) - 1)) * 8) argument
218 #define p9_MMCR1_COMBINE_SHIFT(pmc) (38 - ((pmc - 1) * 2)) argument
250 #define MMCR2_FCS(pmc) (1ull << (63 - (((pmc) - 1) * 9))) argument
251 #define MMCR2_FCP(pmc) (1ull << (62 - (((pmc) - 1) * 9))) argument
252 #define MMCR2_FCWAIT(pmc) (1ull << (58 - (((pmc) - 1) * 9))) argument
[all …]
Dmpc7450-pmu.c39 int pmc; in mpc7450_classify_event() local
41 pmc = (event >> PM_PMC_SH) & PM_PMC_MSK; in mpc7450_classify_event()
42 if (pmc) { in mpc7450_classify_event()
43 if (pmc > N_COUNTER) in mpc7450_classify_event()
79 int pmc, sel; in mpc7450_threshold_use() local
81 pmc = (event >> PM_PMC_SH) & PM_PMC_MSK; in mpc7450_threshold_use()
83 switch (pmc) { in mpc7450_threshold_use()
153 int pmc, class; in mpc7450_get_constraint() local
161 pmc = ((unsigned int)event >> PM_PMC_SH) & PM_PMC_MSK; in mpc7450_get_constraint()
162 mask = pmcbits[pmc - 1][0]; in mpc7450_get_constraint()
[all …]
Disa207-common.c16 PMU_FORMAT_ATTR(pmc, "config:16-19");
172 static unsigned long combine_shift(unsigned long pmc) in combine_shift() argument
175 return p9_MMCR1_COMBINE_SHIFT(pmc); in combine_shift()
177 return MMCR1_COMBINE_SHIFT(pmc); in combine_shift()
403 unsigned int unit, pmc, cache, ebb; in isa207_get_constraint() local
411 pmc = (event >> EVENT_PMC_SHIFT) & EVENT_PMC_MASK; in isa207_get_constraint()
421 if (pmc) { in isa207_get_constraint()
424 if (pmc > 6) in isa207_get_constraint()
430 if (pmc >= 5 && base_event != 0x500fa && in isa207_get_constraint()
434 mask |= CNST_PMC_MASK(pmc); in isa207_get_constraint()
[all …]
/arch/arm64/kvm/
Dpmu-emul.c26 static void kvm_pmu_create_perf_event(struct kvm_pmc *pmc);
27 static void kvm_pmu_release_perf_event(struct kvm_pmc *pmc);
29 static struct kvm_vcpu *kvm_pmc_to_vcpu(const struct kvm_pmc *pmc) in kvm_pmc_to_vcpu() argument
31 return container_of(pmc, struct kvm_vcpu, arch.pmu.pmc[pmc->idx]); in kvm_pmc_to_vcpu()
36 return &vcpu->arch.pmu.pmc[cnt_idx]; in kvm_vcpu_idx_to_pmc()
67 static bool kvm_pmc_is_64bit(struct kvm_pmc *pmc) in kvm_pmc_is_64bit() argument
69 return (pmc->idx == ARMV8_PMU_CYCLE_IDX || in kvm_pmc_is_64bit()
70 kvm_pmu_is_3p5(kvm_pmc_to_vcpu(pmc))); in kvm_pmc_is_64bit()
73 static bool kvm_pmc_has_64bit_overflow(struct kvm_pmc *pmc) in kvm_pmc_has_64bit_overflow() argument
75 u64 val = __vcpu_sys_reg(kvm_pmc_to_vcpu(pmc), PMCR_EL0); in kvm_pmc_has_64bit_overflow()
[all …]
/arch/x86/kvm/svm/
Dpmu.c76 static bool amd_hw_event_available(struct kvm_pmc *pmc) in amd_hw_event_available() argument
100 struct kvm_pmc *pmc; in amd_msr_idx_to_pmc() local
102 pmc = get_gp_pmc_amd(pmu, msr, PMU_TYPE_COUNTER); in amd_msr_idx_to_pmc()
103 pmc = pmc ? pmc : get_gp_pmc_amd(pmu, msr, PMU_TYPE_EVNTSEL); in amd_msr_idx_to_pmc()
105 return pmc; in amd_msr_idx_to_pmc()
134 struct kvm_pmc *pmc; in amd_pmu_get_msr() local
138 pmc = get_gp_pmc_amd(pmu, msr, PMU_TYPE_COUNTER); in amd_pmu_get_msr()
139 if (pmc) { in amd_pmu_get_msr()
140 msr_info->data = pmc_read_counter(pmc); in amd_pmu_get_msr()
144 pmc = get_gp_pmc_amd(pmu, msr, PMU_TYPE_EVNTSEL); in amd_pmu_get_msr()
[all …]
/arch/arm/mach-at91/
Dpm_suspend.S22 pmc .req r0 label
42 2: ldr r8, [pmc, #AT91_PMC_SR]
54 1: ldr r7, [pmc, #AT91_PMC_SR]
65 1: ldr r7, [pmc, #AT91_PMC_SR]
79 str r7, [pmc, #AT91_PMC_SCDR]
476 ldr pmc, .pmc_base
485 ldr tmp1, [pmc, tmp3]
488 str tmp1, [pmc, tmp3]
496 ldr tmp1, [pmc, #AT91_CKGR_MOR]
499 str tmp1, [pmc, #AT91_CKGR_MOR]
[all …]
/arch/arm/boot/dts/microchip/
Dsama5d2.dtsi48 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
64 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
134 clocks = <&pmc PMC_TYPE_PERIPHERAL 42>, <&pmc PMC_TYPE_CORE PMC_UTMI>;
143 clocks = <&pmc PMC_TYPE_PERIPHERAL 41>, <&pmc PMC_TYPE_PERIPHERAL 41>, <&pmc PMC_TYPE_SYSTEM 6>;
152 clocks = <&pmc PMC_TYPE_CORE PMC_UTMI>, <&pmc PMC_TYPE_PERIPHERAL 41>;
176 clocks = <&pmc PMC_TYPE_CORE PMC_MCK2>;
195 clocks = <&pmc PMC_TYPE_PERIPHERAL 31>, <&pmc PMC_TYPE_GCK 31>, <&pmc PMC_TYPE_CORE PMC_MAIN>;
197 assigned-clocks = <&pmc PMC_TYPE_GCK 31>;
206 clocks = <&pmc PMC_TYPE_PERIPHERAL 32>, <&pmc PMC_TYPE_GCK 32>, <&pmc PMC_TYPE_CORE PMC_MAIN>;
208 assigned-clocks = <&pmc PMC_TYPE_GCK 32>;
[all …]
Dsama7g5.dtsi37 clocks = <&pmc PMC_TYPE_CORE PMC_CPUPLL>;
192 clocks = <&pmc PMC_TYPE_CORE PMC_MCK1>;
210 clocks = <&pmc PMC_TYPE_PERIPHERAL 18>;
241 clocks = <&pmc PMC_TYPE_PERIPHERAL 11>;
244 pmc: clock-controller@e0018000 { label
245 compatible = "microchip,sama7g5-pmc", "syscon";
315 …clocks = <&pmc PMC_TYPE_PERIPHERAL 91>, <&pmc PMC_TYPE_PERIPHERAL 92>, <&pmc PMC_TYPE_PERIPHERAL 9…
323 clocks = <&pmc PMC_TYPE_PERIPHERAL 21>;
343 clocks = <&pmc PMC_TYPE_PERIPHERAL 78>, <&pmc PMC_TYPE_GCK 78>;
358 clocks = <&pmc PMC_TYPE_PERIPHERAL 79>, <&pmc PMC_TYPE_GCK 79>;
[all …]
Dsam9x60.dtsi84 clocks = <&pmc PMC_TYPE_PERIPHERAL 23>, <&pmc PMC_TYPE_CORE PMC_UTMI>;
86 assigned-clocks = <&pmc PMC_TYPE_CORE PMC_UTMI>;
95 clocks = <&pmc PMC_TYPE_PERIPHERAL 22>, <&pmc PMC_TYPE_PERIPHERAL 22>, <&pmc PMC_TYPE_SYSTEM 6>;
104 clocks = <&pmc PMC_TYPE_CORE PMC_UTMI>, <&pmc PMC_TYPE_PERIPHERAL 22>;
106 assigned-clocks = <&pmc PMC_TYPE_CORE PMC_UTMI>;
124 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
141 clocks = <&pmc PMC_TYPE_PERIPHERAL 12>, <&pmc PMC_TYPE_GCK 12>;
143 assigned-clocks = <&pmc PMC_TYPE_GCK 12>;
152 clocks = <&pmc PMC_TYPE_PERIPHERAL 26>, <&pmc PMC_TYPE_GCK 26>;
154 assigned-clocks = <&pmc PMC_TYPE_GCK 26>;
[all …]
Dat91sam9260.dtsi118 pmc: clock-controller@fffffc00 { label
119 compatible = "atmel,at91sam9260-pmc", "syscon";
130 clocks = <&pmc PMC_TYPE_CORE PMC_SLOW>;
136 clocks = <&pmc PMC_TYPE_CORE PMC_SLOW>;
143 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
154 …clocks = <&pmc PMC_TYPE_PERIPHERAL 17>, <&pmc PMC_TYPE_PERIPHERAL 18>, <&pmc PMC_TYPE_PERIPHERAL 1…
166 …clocks = <&pmc PMC_TYPE_PERIPHERAL 26>, <&pmc PMC_TYPE_PERIPHERAL 27>, <&pmc PMC_TYPE_PERIPHERAL 2…
507 clocks = <&pmc PMC_TYPE_PERIPHERAL 2>;
518 clocks = <&pmc PMC_TYPE_PERIPHERAL 3>;
529 clocks = <&pmc PMC_TYPE_PERIPHERAL 4>;
[all …]
Dat91sam9261.dtsi84 clocks = <&pmc PMC_TYPE_PERIPHERAL 20>, <&pmc PMC_TYPE_SYSTEM 16>, <&pmc PMC_TYPE_SYSTEM 6>;
95 clocks = <&pmc PMC_TYPE_PERIPHERAL 21>, <&pmc PMC_TYPE_SYSTEM 17>;
115 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
141 …clocks = <&pmc PMC_TYPE_PERIPHERAL 17>, <&pmc PMC_TYPE_PERIPHERAL 18>, <&pmc PMC_TYPE_PERIPHERAL 1…
149 clocks = <&pmc PMC_TYPE_PERIPHERAL 10>, <&pmc PMC_TYPE_SYSTEM 7>;
163 clocks = <&pmc PMC_TYPE_PERIPHERAL 9>;
176 clocks = <&pmc PMC_TYPE_PERIPHERAL 11>;
189 clocks = <&pmc PMC_TYPE_PERIPHERAL 6>;
203 clocks = <&pmc PMC_TYPE_PERIPHERAL 7>;
217 clocks = <&pmc PMC_TYPE_PERIPHERAL 8>;
[all …]
Dat91sam9g45.dtsi111 clocks = <&pmc PMC_TYPE_SYSTEM 2>;
118 clocks = <&pmc PMC_TYPE_SYSTEM 2>;
132 pmc: clock-controller@fffffc00 { label
133 compatible = "atmel,at91sam9g45-pmc", "syscon";
151 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
167 …clocks = <&pmc PMC_TYPE_PERIPHERAL 18>, <&pmc PMC_TYPE_PERIPHERAL 18>, <&pmc PMC_TYPE_PERIPHERAL 1…
177 …clocks = <&pmc PMC_TYPE_PERIPHERAL 18>, <&pmc PMC_TYPE_PERIPHERAL 18>, <&pmc PMC_TYPE_PERIPHERAL 1…
186 clocks = <&pmc PMC_TYPE_PERIPHERAL 21>;
629 clocks = <&pmc PMC_TYPE_PERIPHERAL 2>;
640 clocks = <&pmc PMC_TYPE_PERIPHERAL 3>;
[all …]
Dat91sam9x5.dtsi120 clocks = <&pmc PMC_TYPE_SYSTEM 2>;
129 pmc: clock-controller@fffffc00 { label
130 compatible = "atmel,at91sam9x5-pmc", "syscon";
154 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
170 clocks = <&pmc PMC_TYPE_PERIPHERAL 17>, <&clk32k>;
180 clocks = <&pmc PMC_TYPE_PERIPHERAL 17>, <&clk32k>;
189 clocks = <&pmc PMC_TYPE_PERIPHERAL 20>;
198 clocks = <&pmc PMC_TYPE_PERIPHERAL 21>;
596 clocks = <&pmc PMC_TYPE_PERIPHERAL 2>;
608 clocks = <&pmc PMC_TYPE_PERIPHERAL 2>;
[all …]
Dsama5d4.dtsi109 clocks = <&pmc PMC_TYPE_PERIPHERAL 19>;
117 clocks = <&pmc PMC_TYPE_PERIPHERAL 47>, <&pmc PMC_TYPE_CORE PMC_UTMI>;
126 clocks = <&pmc PMC_TYPE_PERIPHERAL 46>, <&pmc PMC_TYPE_PERIPHERAL 46>, <&pmc PMC_TYPE_SYSTEM 6>;
135 clocks = <&pmc PMC_TYPE_CORE PMC_UTMI>, <&pmc PMC_TYPE_PERIPHERAL 46>;
159 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
189 clocks = <&pmc PMC_TYPE_PERIPHERAL 51>, <&pmc PMC_TYPE_SYSTEM 3>, <&clk32k>;
218 clocks = <&pmc PMC_TYPE_PERIPHERAL 50>;
228 clocks = <&pmc PMC_TYPE_PERIPHERAL 52>;
240 clocks = <&pmc PMC_TYPE_SYSTEM 2>, <&pmc PMC_TYPE_PERIPHERAL 16>;
249 clocks = <&pmc PMC_TYPE_PERIPHERAL 8>;
[all …]
/arch/x86/kvm/vmx/
Dpmu_intel.c73 struct kvm_pmc *pmc; in reprogram_fixed_counters() local
85 pmc = get_fixed_pmc(pmu, MSR_CORE_PERF_FIXED_CTR0 + i); in reprogram_fixed_counters()
88 kvm_pmu_request_counter_reprogram(pmc); in reprogram_fixed_counters()
104 static bool intel_hw_event_available(struct kvm_pmc *pmc) in intel_hw_event_available() argument
106 struct kvm_pmu *pmu = pmc_to_pmu(pmc); in intel_hw_event_available()
107 u8 event_select = pmc->eventsel & ARCH_PERFMON_EVENTSEL_EVENT; in intel_hw_event_available()
108 u8 unit_mask = (pmc->eventsel & ARCH_PERFMON_EVENTSEL_UMASK) >> 8; in intel_hw_event_available()
234 struct kvm_pmc *pmc; in intel_msr_idx_to_pmc() local
236 pmc = get_fixed_pmc(pmu, msr); in intel_msr_idx_to_pmc()
237 pmc = pmc ? pmc : get_gp_pmc(pmu, msr, MSR_P6_EVNTSEL0); in intel_msr_idx_to_pmc()
[all …]
/arch/powerpc/kvm/
Dbook3s_hv_p9_perf.c88 mtspr(SPRN_PMC1, vcpu->arch.pmc[0]); in switch_pmu_to_guest()
89 mtspr(SPRN_PMC2, vcpu->arch.pmc[1]); in switch_pmu_to_guest()
90 mtspr(SPRN_PMC3, vcpu->arch.pmc[2]); in switch_pmu_to_guest()
91 mtspr(SPRN_PMC4, vcpu->arch.pmc[3]); in switch_pmu_to_guest()
92 mtspr(SPRN_PMC5, vcpu->arch.pmc[4]); in switch_pmu_to_guest()
93 mtspr(SPRN_PMC6, vcpu->arch.pmc[5]); in switch_pmu_to_guest()
142 vcpu->arch.pmc[0] = mfspr(SPRN_PMC1); in switch_pmu_to_host()
143 vcpu->arch.pmc[1] = mfspr(SPRN_PMC2); in switch_pmu_to_host()
144 vcpu->arch.pmc[2] = mfspr(SPRN_PMC3); in switch_pmu_to_host()
145 vcpu->arch.pmc[3] = mfspr(SPRN_PMC4); in switch_pmu_to_host()
[all …]
/arch/powerpc/boot/dts/fsl/
Dmpc8568si-post.dtsi40 sleep = <&pmc 0x08000000>;
52 sleep = <&pmc 0x80000000>;
64 sleep = <&pmc 0x20000000>;
90 sleep = <&pmc 0x00080000>;
129 sleep = <&pmc 0x00000004>;
141 sleep = <&pmc 0x00000002>;
158 sleep = <&pmc 0x00000400>;
163 sleep = <&pmc 0x00000080>;
168 sleep = <&pmc 0x00000040>;
178 sleep = <&pmc 0x01000000>;
[all …]

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