Home
last modified time | relevance | path

Searched refs:reg_num (Results 1 – 18 of 18) sorted by relevance

/arch/sparc/kernel/
Dpcr.c55 static u64 direct_pcr_read(unsigned long reg_num) in direct_pcr_read() argument
59 WARN_ON_ONCE(reg_num != 0); in direct_pcr_read()
64 static void direct_pcr_write(unsigned long reg_num, u64 val) in direct_pcr_write() argument
66 WARN_ON_ONCE(reg_num != 0); in direct_pcr_write()
70 static u64 direct_pic_read(unsigned long reg_num) in direct_pic_read() argument
74 WARN_ON_ONCE(reg_num != 0); in direct_pic_read()
79 static void direct_pic_write(unsigned long reg_num, u64 val) in direct_pic_write() argument
81 WARN_ON_ONCE(reg_num != 0); in direct_pic_write()
111 static void n2_pcr_write(unsigned long reg_num, u64 val) in n2_pcr_write() argument
115 WARN_ON_ONCE(reg_num != 0); in n2_pcr_write()
[all …]
Dunaligned_32.c180 static int do_int_store(int reg_num, int size, unsigned long *dst_addr, in do_int_store() argument
186 if (reg_num) in do_int_store()
187 src_val = fetch_reg_addr(reg_num, regs); in do_int_store()
Dunaligned_64.c203 static inline int do_int_store(int reg_num, int size, unsigned long *dst_addr, in do_int_store() argument
212 zero = (((long)(reg_num ? in do_int_store()
213 (unsigned int)fetch_reg(reg_num, regs) : 0)) << 32) | in do_int_store()
214 (unsigned int)fetch_reg(reg_num + 1, regs); in do_int_store()
215 } else if (reg_num) { in do_int_store()
216 src_val_p = fetch_reg_addr(reg_num, regs); in do_int_store()
/arch/riscv/kvm/
Dvcpu_fp.c84 unsigned long reg_num = reg->id & ~(KVM_REG_ARCH_MASK | in kvm_riscv_vcpu_get_reg_fp() local
93 if (reg_num == KVM_REG_RISCV_FP_F_REG(fcsr)) in kvm_riscv_vcpu_get_reg_fp()
95 else if ((KVM_REG_RISCV_FP_F_REG(f[0]) <= reg_num) && in kvm_riscv_vcpu_get_reg_fp()
96 reg_num <= KVM_REG_RISCV_FP_F_REG(f[31])) in kvm_riscv_vcpu_get_reg_fp()
97 reg_val = &cntx->fp.f.f[reg_num]; in kvm_riscv_vcpu_get_reg_fp()
102 if (reg_num == KVM_REG_RISCV_FP_D_REG(fcsr)) { in kvm_riscv_vcpu_get_reg_fp()
106 } else if ((KVM_REG_RISCV_FP_D_REG(f[0]) <= reg_num) && in kvm_riscv_vcpu_get_reg_fp()
107 reg_num <= KVM_REG_RISCV_FP_D_REG(f[31])) { in kvm_riscv_vcpu_get_reg_fp()
110 reg_val = &cntx->fp.d.f[reg_num]; in kvm_riscv_vcpu_get_reg_fp()
129 unsigned long reg_num = reg->id & ~(KVM_REG_ARCH_MASK | in kvm_riscv_vcpu_set_reg_fp() local
[all …]
Dvcpu_onereg.c124 unsigned long reg_num = reg->id & ~(KVM_REG_ARCH_MASK | in kvm_riscv_vcpu_get_reg_config() local
132 switch (reg_num) { in kvm_riscv_vcpu_get_reg_config()
173 unsigned long reg_num = reg->id & ~(KVM_REG_ARCH_MASK | in kvm_riscv_vcpu_set_reg_config() local
184 switch (reg_num) { in kvm_riscv_vcpu_set_reg_config()
278 unsigned long reg_num = reg->id & ~(KVM_REG_ARCH_MASK | in kvm_riscv_vcpu_get_reg_core() local
285 if (reg_num >= sizeof(struct kvm_riscv_core) / sizeof(unsigned long)) in kvm_riscv_vcpu_get_reg_core()
288 if (reg_num == KVM_REG_RISCV_CORE_REG(regs.pc)) in kvm_riscv_vcpu_get_reg_core()
290 else if (KVM_REG_RISCV_CORE_REG(regs.pc) < reg_num && in kvm_riscv_vcpu_get_reg_core()
291 reg_num <= KVM_REG_RISCV_CORE_REG(regs.t6)) in kvm_riscv_vcpu_get_reg_core()
292 reg_val = ((unsigned long *)cntx)[reg_num]; in kvm_riscv_vcpu_get_reg_core()
[all …]
Dvcpu_sbi.c136 unsigned long reg_num, in riscv_vcpu_set_sbi_ext_single() argument
143 if (reg_num >= KVM_RISCV_SBI_EXT_MAX) in riscv_vcpu_set_sbi_ext_single()
150 if (sbi_ext[i].ext_idx == reg_num) { in riscv_vcpu_set_sbi_ext_single()
172 unsigned long reg_num, in riscv_vcpu_get_sbi_ext_single() argument
179 if (reg_num >= KVM_RISCV_SBI_EXT_MAX) in riscv_vcpu_get_sbi_ext_single()
183 if (sbi_ext[i].ext_idx == reg_num) { in riscv_vcpu_get_sbi_ext_single()
205 unsigned long reg_num, in riscv_vcpu_set_sbi_ext_multi() argument
210 if (reg_num > KVM_REG_RISCV_SBI_MULTI_REG_LAST) in riscv_vcpu_set_sbi_ext_multi()
214 ext_id = i + reg_num * BITS_PER_LONG; in riscv_vcpu_set_sbi_ext_multi()
225 unsigned long reg_num, in riscv_vcpu_get_sbi_ext_multi() argument
[all …]
Dvcpu_vector.c95 unsigned long reg_num, in kvm_riscv_vcpu_vreg_addr() argument
102 if (reg_num < KVM_REG_RISCV_VECTOR_REG(0)) { in kvm_riscv_vcpu_vreg_addr()
105 switch (reg_num) { in kvm_riscv_vcpu_vreg_addr()
122 } else if (reg_num <= KVM_REG_RISCV_VECTOR_REG(31)) { in kvm_riscv_vcpu_vreg_addr()
126 (reg_num - KVM_REG_RISCV_VECTOR_REG(0)) * vlenb; in kvm_riscv_vcpu_vreg_addr()
140 unsigned long reg_num = reg->id & ~(KVM_REG_ARCH_MASK | in kvm_riscv_vcpu_get_reg_vector() local
150 rc = kvm_riscv_vcpu_vreg_addr(vcpu, reg_num, reg_size, &reg_addr); in kvm_riscv_vcpu_get_reg_vector()
166 unsigned long reg_num = reg->id & ~(KVM_REG_ARCH_MASK | in kvm_riscv_vcpu_set_reg_vector() local
176 rc = kvm_riscv_vcpu_vreg_addr(vcpu, reg_num, reg_size, &reg_addr); in kvm_riscv_vcpu_set_reg_vector()
Dvcpu_timer.c165 unsigned long reg_num = reg->id & ~(KVM_REG_ARCH_MASK | in kvm_riscv_vcpu_get_reg_timer() local
172 if (reg_num >= sizeof(struct kvm_riscv_timer) / sizeof(u64)) in kvm_riscv_vcpu_get_reg_timer()
175 switch (reg_num) { in kvm_riscv_vcpu_get_reg_timer()
205 unsigned long reg_num = reg->id & ~(KVM_REG_ARCH_MASK | in kvm_riscv_vcpu_set_reg_timer() local
213 if (reg_num >= sizeof(struct kvm_riscv_timer) / sizeof(u64)) in kvm_riscv_vcpu_set_reg_timer()
219 switch (reg_num) { in kvm_riscv_vcpu_set_reg_timer()
Daia.c173 unsigned long reg_num, in kvm_riscv_vcpu_aia_get_csr() argument
178 if (reg_num >= sizeof(struct kvm_riscv_aia_csr) / sizeof(unsigned long)) in kvm_riscv_vcpu_aia_get_csr()
183 *out_val = ((unsigned long *)csr)[reg_num]; in kvm_riscv_vcpu_aia_get_csr()
189 unsigned long reg_num, in kvm_riscv_vcpu_aia_set_csr() argument
194 if (reg_num >= sizeof(struct kvm_riscv_aia_csr) / sizeof(unsigned long)) in kvm_riscv_vcpu_aia_set_csr()
198 ((unsigned long *)csr)[reg_num] = val; in kvm_riscv_vcpu_aia_set_csr()
201 if (reg_num == KVM_REG_RISCV_CSR_AIA_REG(siph)) in kvm_riscv_vcpu_aia_set_csr()
/arch/powerpc/platforms/powernv/
Dopal-fadump.h82 __be32 reg_num; member
87 u32 reg_type, u32 reg_num, in opal_fadump_set_regval_regnum() argument
91 if (reg_num < 32) in opal_fadump_set_regval_regnum()
92 regs->gpr[reg_num] = reg_val; in opal_fadump_set_regval_regnum()
96 switch (reg_num) { in opal_fadump_set_regval_regnum()
141 be32_to_cpu(reg_entry->reg_num), in opal_fadump_read_regs()
/arch/sparc/include/asm/
Dhypervisor.h3445 unsigned long sun4v_vt_get_perfreg(unsigned long reg_num,
3447 unsigned long sun4v_vt_set_perfreg(unsigned long reg_num,
3455 unsigned long sun4v_t5_get_perfreg(unsigned long reg_num,
3457 unsigned long sun4v_t5_set_perfreg(unsigned long reg_num,
3466 unsigned long sun4v_m7_get_perfreg(unsigned long reg_num,
3468 unsigned long sun4v_m7_set_perfreg(unsigned long reg_num,
/arch/powerpc/sysdev/
Dmpic_msgr.c49 struct mpic_msgr *mpic_msgr_get(unsigned int reg_num) in mpic_msgr_get() argument
57 if (reg_num >= mpic_msgr_count) in mpic_msgr_get()
61 msgr = mpic_msgrs[reg_num]; in mpic_msgr_get()
/arch/arm64/include/asm/
Dkvm_emulate.h187 u8 reg_num) in vcpu_get_reg() argument
189 return (reg_num == 31) ? 0 : vcpu_gp_regs(vcpu)->regs[reg_num]; in vcpu_get_reg()
192 static __always_inline void vcpu_set_reg(struct kvm_vcpu *vcpu, u8 reg_num, in vcpu_set_reg() argument
195 if (reg_num != 31) in vcpu_set_reg()
196 vcpu_gp_regs(vcpu)->regs[reg_num] = val; in vcpu_set_reg()
/arch/riscv/include/asm/
Dkvm_aia.h133 unsigned long reg_num,
136 unsigned long reg_num,
/arch/powerpc/include/asm/
Dmpic_msgr.h33 extern struct mpic_msgr *mpic_msgr_get(unsigned int reg_num);
/arch/sh/kernel/
Ddwarf.c63 unsigned int reg_num) in dwarf_frame_alloc_reg() argument
77 reg->number = reg_num; in dwarf_frame_alloc_reg()
105 unsigned int reg_num) in dwarf_frame_reg() argument
110 if (reg->number == reg_num) in dwarf_frame_reg()
/arch/arm64/kvm/
Dguest.c435 unsigned int reg_num; in sve_reg_to_region() local
451 reg_num = (reg->id & SVE_REG_ID_MASK) >> SVE_REG_ID_SHIFT; in sve_reg_to_region()
459 reqoffset = SVE_SIG_ZREG_OFFSET(vq, reg_num) - in sve_reg_to_region()
469 reqoffset = SVE_SIG_PREG_OFFSET(vq, reg_num) - in sve_reg_to_region()
/arch/ia64/include/asm/
Dpal.h617 reg_num : 7, /* Register number */ member
1701 ia64_pal_tr_read (u64 reg_num, u64 tr_type, u64 *tr_buffer, pal_tr_valid_u_t *tr_valid) in ia64_pal_tr_read() argument
1704 PAL_CALL_PHYS_STK(iprv, PAL_VM_TR_READ, reg_num, tr_type,(u64)ia64_tpa(tr_buffer)); in ia64_pal_tr_read()