| /arch/arm64/crypto/ |
| D | aes-ce-core.S | 13 ld1 {v0.16b}, [x2]
22 1: aese v0.16b, v2.16b
23 aesmc v0.16b, v0.16b
25 aese v0.16b, v3.16b
26 aesmc v0.16b, v0.16b
29 aese v0.16b, v1.16b
30 aesmc v0.16b, v0.16b
33 aese v0.16b, v2.16b
34 eor v0.16b, v0.16b, v3.16b
35 st1 {v0.16b}, [x1]
[all …]
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| D | aes-ce-ccm-core.S | 19 ld1 {v0.16b}, [x0] /* load mac */
30 eor v0.16b, v0.16b, v1.16b
42 3: aese v0.16b, v4.16b
43 aesmc v0.16b, v0.16b
45 aese v0.16b, v5.16b
46 aesmc v0.16b, v0.16b
49 aese v0.16b, v3.16b
50 aesmc v0.16b, v0.16b
53 aese v0.16b, v4.16b
55 eor v0.16b, v0.16b, v5.16b /* final round */
[all …]
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| D | sm4-ce-core.S | 51 ld1 {v0.16b}, [x0];
52 rev32 v0.16b, v0.16b;
59 eor v0.16b, v0.16b, v1.16b;
61 sm4ekey v0.4s, v0.4s, v24.4s;
62 sm4ekey v1.4s, v0.4s, v25.4s;
73 st1 {v0.16b-v3.16b}, [x1], #64;
83 tbl v23.16b, {v0.16b}, v24.16b
100 ld1 {v0.16b}, [x2];
101 SM4_CRYPT_BLK(v0);
102 st1 {v0.16b}, [x1];
[all …]
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| D | aes-modes.S | 26 encrypt_block4x v0, v1, v2, v3, w3, x2, x8, w7
31 decrypt_block4x v0, v1, v2, v3, w3, x2, x8, w7
37 encrypt_block5x v0, v1, v2, v3, v4, w3, x2, x8, w7
42 decrypt_block5x v0, v1, v2, v3, v4, w3, x2, x8, w7
62 ld1 {v0.16b-v3.16b}, [x1], #64 /* get 4 pt blocks */
66 st1 {v0.16b-v3.16b}, [x0], #64
73 ld1 {v0.16b}, [x1], #16 /* get next pt block */
74 encrypt_block v0, w3, x2, x5, w6
75 st1 {v0.16b}, [x0], #16
92 ld1 {v0.16b-v3.16b}, [x1], #64 /* get 4 ct blocks */
[all …]
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| D | sm4-neon-core.S | 273 ld4 {v0.4s-v3.4s}, [x2], #64
276 SM4_CRYPT_BLK8(v0, v1, v2, v3, v4, v5, v6, v7)
278 st1 {v0.16b-v3.16b}, [x1], #64
291 ld4 {v0.4s-v3.4s}, [x2], #64
293 SM4_CRYPT_BLK4(v0, v1, v2, v3)
295 st1 {v0.16b-v3.16b}, [x1], #64
301 ld1 {v0.16b}, [x2], #16
308 transpose_4x4(v0, v1, v2, v3)
310 SM4_CRYPT_BLK4(v0, v1, v2, v3)
313 st1 {v0.16b}, [x1], #16
[all …]
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| D | crct10dif-ce-core.S | 275 CPU_LE( rev64 v0.16b, v0.16b )
283 CPU_LE( ext v0.16b, v0.16b, v0.16b, #8 )
295 eor v0.16b, v0.16b, v8.16b
308 fold_32_bytes \p, v0, v1
322 fold_16_bytes \p, v0, v4
346 CPU_LE( rev64 v0.16b, v0.16b )
347 CPU_LE( ext v0.16b, v0.16b, v0.16b, #8 )
348 eor v7.16b, v7.16b, v0.16b
368 CPU_LE( rev64 v0.16b, v0.16b )
369 CPU_LE( ext v0.16b, v0.16b, v0.16b, #8 )
[all …]
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| D | sm3-ce-core.S | 89 0: ld1 {v0.16b-v3.16b}, [x1], #64
95 CPU_LE( rev32 v0.16b, v0.16b )
102 qround a, v0, v1, v2, v3, v4
103 qround a, v1, v2, v3, v4, v0
104 qround a, v2, v3, v4, v0, v1
105 qround a, v3, v4, v0, v1, v2
109 qround b, v4, v0, v1, v2, v3
110 qround b, v0, v1, v2, v3, v4
111 qround b, v1, v2, v3, v4, v0
112 qround b, v2, v3, v4, v0, v1
[all …]
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| D | sm4-ce-gcm-core.S | 237 #define RR1 v0
275 rev32 v0.16b, RZERO.16b
276 SM4_CRYPT_BLK_BE(v0)
279 rbit RH1.16b, v0.16b
322 ld1 {v0.16b-v3.16b}, [x2], #64
324 rbit v0.16b, v0.16b
335 eor RHASH.16b, RHASH.16b, v0.16b
357 ld1 {v0.16b}, [x2], #16
358 rbit v0.16b, v0.16b
359 eor RHASH.16b, RHASH.16b, v0.16b
[all …]
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| D | sm4-ce-ccm-core.S | 57 ld1 {v0.16b-v3.16b}, [x2], #64
60 eor RMAC.16b, RMAC.16b, v0.16b
74 ld1 {v0.16b}, [x2], #16
77 eor RMAC.16b, RMAC.16b, v0.16b
96 ld1 {v0.16b}, [x1]
98 SM4_CRYPT_BLK2(RMAC, v0)
101 eor RMAC.16b, RMAC.16b, v0.16b
137 ld1 {v0.16b-v3.16b}, [x2], #64
140 eor v8.16b, v8.16b, v0.16b
141 eor RMAC.16b, RMAC.16b, v0.16b
[all …]
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| /arch/mips/include/asm/mach-cavium-octeon/ |
| D | kernel-entry-init.h | 30 dmfc0 v0, CP0_CVMMEMCTL_REG
32 dins v0, $0, 0, 6
33 ori v0, CONFIG_CAVIUM_OCTEON_CVMSEG_SIZE
34 dmtc0 v0, CP0_CVMMEMCTL_REG # Write the cavium mem control register
35 dmfc0 v0, CP0_CVMCTL_REG # Read the cavium control register
38 or v0, v0, 0x5001
39 xor v0, v0, 0x1001
43 and v0, v0, v1
44 ori v0, v0, (6 << 7)
64 or v0, v0, 0x2000 # Set IPREF bit.
[all …]
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| /arch/riscv/lib/ |
| D | xor.S | 11 vle8.v v0, (a1)
14 vxor.vv v16, v0, v8
25 vle8.v v0, (a1)
28 vxor.vv v0, v0, v8
31 vxor.vv v16, v0, v16
42 vle8.v v0, (a1)
45 vxor.vv v0, v0, v8
48 vxor.vv v0, v0, v16
51 vxor.vv v16, v0, v24
62 vle8.v v0, (a1)
[all …]
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| /arch/arm64/lib/ |
| D | xor-neon.c | 19 register uint64x2_t v0, v1, v2, v3; in xor_arm64_neon_2() local
24 v0 = veorq_u64(vld1q_u64(dp1 + 0), vld1q_u64(dp2 + 0)); in xor_arm64_neon_2()
30 vst1q_u64(dp1 + 0, v0); in xor_arm64_neon_2()
48 register uint64x2_t v0, v1, v2, v3; in xor_arm64_neon_3() local
53 v0 = veorq_u64(vld1q_u64(dp1 + 0), vld1q_u64(dp2 + 0)); in xor_arm64_neon_3()
59 v0 = veorq_u64(v0, vld1q_u64(dp3 + 0)); in xor_arm64_neon_3()
65 vst1q_u64(dp1 + 0, v0); in xor_arm64_neon_3()
86 register uint64x2_t v0, v1, v2, v3; in xor_arm64_neon_4() local
91 v0 = veorq_u64(vld1q_u64(dp1 + 0), vld1q_u64(dp2 + 0)); in xor_arm64_neon_4()
97 v0 = veorq_u64(v0, vld1q_u64(dp3 + 0)); in xor_arm64_neon_4()
[all …]
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| /arch/mips/lib/ |
| D | strncpy_user.S | 38 1: EX(lbue, v0, (v1), .Lfault)
41 1: EX(lbu, v0, (v1), .Lfault)
45 sb v0, (a0)
46 beqz v0, 2f
50 2: PTR_ADDU v0, a1, t0
51 xor v0, a1
52 bltz v0, .Lfault
53 move v0, t0
58 li v0, -EFAULT
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| D | strnlen_user.S | 30 move v0, a0
37 beq v0, a1, 1f # limit reached?
41 EX(lbe, t0, (v0), .Lfault)
44 EX(lb, t0, (v0), .Lfault)
50 PTR_ADDIU v0, 1
52 PTR_ADDU v0, AT
56 PTR_SUBU v0, a0
61 move v0, zero
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| /arch/powerpc/crypto/ |
| D | crc32-vpmsum_core.S | 101 vspltisw v0,-1
103 vsldoi mask_32bit,zeroes,v0,4
104 vsldoi mask_64bit,zeroes,v0,8
157 vxor v0,v0,v0
256 vxor v0,v0,v8
313 vxor v0,v0,v8
347 vxor v0,v0,v8
363 vsldoi v0,v0,zeroes,4
393 vxor v16,v0,v8
422 lvx v0,0,r3
[all …]
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| /arch/mips/kernel/ |
| D | scall32-o32.S | 84 subu t2, v0, __NR_O32_Linux
89 LONG_S v0, TI_SYSCALL($28) # Save v0 as syscall number
97 subu v0, v0, __NR_O32_Linux # check syscall number
98 sltiu t0, v0, __NR_O32_Linux_syscalls
101 sll t0, v0, 2
111 sltu t0, t0, v0
116 negu v0 # error
118 1: sw v0, PT_R2(sp) # result
131 bltz v0, 1f # seccomp failed? Skip syscall
134 lw v0, PT_R2(sp) # Restore syscall (maybe modified)
[all …]
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| D | scall64-o32.S | 36 dsubu t0, v0, __NR_O32_Linux # check syscall number
43 move a1, v0
90 subu t2, v0, __NR_O32_Linux
95 LONG_S v0, TI_SYSCALL($28) # Save v0 as syscall number
104 dsll t0, v0, 3 # offset into table
110 sltu t0, t0, v0
115 dnegu v0 # error
117 1: sd v0, PT_R2(sp) # result
134 bltz v0, 1f # seccomp failed? Skip syscall
137 ld v0, PT_R2(sp) # Restore syscall (maybe modified)
[all …]
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| D | scall64-n32.S | 35 dsubu t0, v0, __NR_N32_Linux # check syscall number
47 LONG_S v0, TI_SYSCALL($28) # Store syscall number
55 dsll t0, v0, 3 # offset into table
61 sltu t0, t0, v0
66 dnegu v0 # error
68 1: sd v0, PT_R2(sp) # result
79 bltz v0, 1f # seccomp failed? Skip syscall
82 ld v0, PT_R2(sp) # Restore syscall (maybe modified)
90 dsubu t2, v0, __NR_N32_Linux # check (new) syscall number
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| D | scall64-n64.S | 49 LONG_S v0, TI_SYSCALL($28) # Store syscall number
57 dsubu t2, v0, __NR_64_Linux
70 sltu t0, t0, v0
75 dnegu v0 # error
77 1: sd v0, PT_R2(sp) # result
89 bltz v0, 1f # seccomp failed? Skip syscall
92 ld v0, PT_R2(sp) # Restore syscall (maybe modified)
105 li v0, ENOSYS # error
106 sd v0, PT_R2(sp)
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| D | bmips_5xxx_init.S | 139 li v0, 0x40
140 sllv v0, v0, a0
168 sll v0, v0, a0
188 multu v0, a0 /*multu is interlocked, so no need to insert nops */
189 mflo v0
194 move v0, zero
232 li v0, 0x40
233 sllv v0, v0, a0
260 sll v0, v0, a0
279 multu v0, a0 /*multu is interlocked, so no need to insert nops */
[all …]
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| /arch/mips/include/asm/mach-malta/ |
| D | kernel-entry-init.h | 113 PTR_LA v0, 0x9fc00534 /* YAMON print */
114 lw v0, (v0)
117 jal v0
119 PTR_LA v0, 0x9fc00520 /* YAMON exit */
120 lw v0, (v0)
122 jal v0
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| /arch/riscv/crypto/ |
| D | aes-riscv64-zvkned-zvkb.S | 72 vmv.v.x v0, t0
80 vrev8.v v31, v31, v0.t
89 viota.m v20, v0, v0.t
92 vadd.vv v16, v16, v20, v0.t
102 vadd.vx v16, v16, VL_BLOCKS, v0.t
106 vrev8.v v24, v24, v0.t // Convert counters back to big-endian.
129 vadd.vx v16, v16, VL_BLOCKS, v0.t
130 vrev8.v v16, v16, v0.t // Convert counters back to big-endian.
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| /arch/alpha/include/asm/ |
| D | pal.h | 123 register unsigned long v0 __asm__("$0"); in qemu_get_walltime()
127 : "=r"(v0), "+r"(a0) in qemu_get_walltime()
131 return v0; in qemu_get_walltime()
137 register unsigned long v0 __asm__("$0"); in qemu_get_alarm()
141 : "=r"(v0), "+r"(a0) in qemu_get_alarm()
145 return v0; in qemu_get_alarm()
175 register unsigned long v0 __asm__("$0"); in qemu_get_vmtime()
179 : "=r"(v0), "+r"(a0) in qemu_get_vmtime()
183 return v0; in qemu_get_vmtime()
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| /arch/alpha/lib/ |
| D | strchr.S | 25 andnot a0, 7, v0 # .. e1 : align our loop pointer
41 $loop: ldq t0, 8(v0) # e0 :
42 addq v0, 8, v0 # .. e1 :
63 addq v0, t4, v0 # .. e1 :
64 addq v0, t2, v0 # e0 :
68 mov zero, v0 # e0 :
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| D | strrchr.S | 29 andnot a0, 7, v0 # .. e1 : align source addr
45 ldq t0, 8(v0) # e0 : load next quadword
46 cmovne t3, v0, t6 # .. e1 : save previous comparisons match
48 addq v0, 8, v0 # .. e1 :
63 cmovne t3, v0, t6 # e0 :
80 addq t6, t0, v0 # .. e1 : add our aligned base ptr to the mix
81 addq v0, t1, v0 # e0 :
85 mov zero, v0 # e0 :
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