| /drivers/gpu/drm/amd/display/modules/color/ |
| D | color_gamma.h | 67 int A2[3]; member
|
| D | color_gamma.c | 1771 regamma->coeff.A2[i], 1000); in calculate_user_regamma_coeff()
|
| /drivers/gpu/drm/i915/ |
| D | intel_step.h | 29 func(A2) \
|
| /drivers/pinctrl/renesas/ |
| D | Kconfig | 177 bool "pin control support for RZ/A2"
184 This selects GPIO and pinctrl driver for Renesas RZ/A2 platforms.
|
| D | pfc-r8a77970.c | 166 #define IP0_11_8 FM(DU_DR4) FM(HCTS0_N) F_(0, 0) FM(A2) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_…
403 PINMUX_IPSR_GPSR(IP0_11_8, A2),
|
| D | pfc-r8a77980.c | 200 #define IP0_11_8 FM(DU_DR4) FM(TX4) FM(GETHER_RMII_RXD0) FM(A2) F_(0, 0) F_(0, 0) F_(0, 0) F_(…
474 PINMUX_IPSR_GPSR(IP0_11_8, A2),
|
| D | pfc-r8a77990.c | 108 #define GPSR1_2 F_(A2, IP3_7_4)
239 #define IP3_7_4 FM(A2) FM(IRQ2) FM(AVB_AVTP_PPS) FM(VI4_CLKENB) FM(VI5_DATA1_A) FM(DU_DISP) F…
675 PINMUX_IPSR_GPSR(IP3_7_4, A2),
|
| D | pfc-sh7734.c | 600 PINMUX_IPSR_GPSR(IP0_5_4, A2),
1368 GPIO_FN(A2), GPIO_FN(ST0_SYC), GPIO_FN(LCD_DATA2_A),
|
| D | pfc-r8a77951.c | 125 #define GPSR1_2 F_(A2, IP2_7_4)
271 #define IP2_7_4 FM(A2) FM(LCDOUT18) FM(MSIOF3_SCK_B) F_(0, 0) FM(VI4_DATA10) F_(0, 0) FM(DU_DB…
750 PINMUX_IPSR_GPSR(IP2_7_4, A2),
|
| D | pfc-r8a7796.c | 130 #define GPSR1_2 F_(A2, IP2_7_4)
276 #define IP2_7_4 FM(A2) FM(LCDOUT18) FM(MSIOF3_SCK_B) F_(0, 0) FM(VI4_DATA10) F_(0, 0) FM(DU_DB…
754 PINMUX_IPSR_GPSR(IP2_7_4, A2),
|
| D | pfc-r8a77965.c | 130 #define GPSR1_2 F_(A2, IP2_7_4)
276 #define IP2_7_4 FM(A2) FM(LCDOUT18) FM(MSIOF3_SCK_B) F_(0, 0) FM(VI4_DATA10) F_(0, 0) FM(DU_DB…
756 PINMUX_IPSR_GPSR(IP2_7_4, A2),
|
| D | pfc-r8a779a0.c | 359 #define IP0SR1_11_8 FM(HSCK0) FM(SCK0) F_(0, 0) F_(0, 0) F_(0, 0) FM(A2) F_(0, 0) F_(0, 0) F_(0, 0…
800 PINMUX_IPSR_GPSR(IP0SR1_11_8, A2),
|
| D | pfc-r8a7792.c | 375 PINMUX_SINGLE(A2),
|
| D | pfc-sh7264.c | 1284 GPIO_FN(A2),
|
| D | pfc-r8a73a4.c | 340 F1(A2), F2(MMCCMD1), IRQ(39), /* Port200 */
|
| D | pfc-sh7757.c | 1647 GPIO_FN(A2),
|
| /drivers/pinctrl/aspeed/ |
| D | pinctrl-aspeed-g5.c | 1197 #define A2 160 macro
1198 SIG_EXPR_LIST_DECL_SINGLE(A2, GPIOU0, GPIOU0, SIG_DESC_SET(SCUA0, 8));
1199 SIG_EXPR_LIST_DECL_SINGLE(A2, RMII2TXD0, RMII2, RMII2_DESC);
1200 SIG_EXPR_LIST_DECL_SINGLE(A2, RGMII2TXD0, RGMII2);
1201 PIN_DECL_(A2, SIG_EXPR_LIST_PTR(A2, GPIOU0), SIG_EXPR_LIST_PTR(A2, RMII2TXD0),
1202 SIG_EXPR_LIST_PTR(A2, RGMII2TXD0));
1312 FUNC_GROUP_DECL(RGMII2, B2, B1, A2, B3, D5, D4, C2, C1, C3, D1, D2, E6);
1313 FUNC_GROUP_DECL(RMII2, B2, B1, A2, B3, C2, C3, D1, D2, E6);
1913 ASPEED_PINCTRL_PIN(A2),
|
| D | pinctrl-aspeed-g6.c | 1343 #define A2 215 macro
1344 SIG_EXPR_LIST_DECL_SESG(A2, RGMII1RXCTL, RGMII1, SIG_DESC_SET(SCU400, 7),
1346 PIN_DECL_1(A2, GPIO18A7, RGMII1RXCTL);
1376 FUNC_GROUP_DECL(RGMII1, C6, D6, D5, A3, C5, E6, B3, A2, B2, B1, C4, E5);
1646 ASPEED_PINCTRL_PIN(A2),
2624 ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_PULL_DOWN, C6, A2, SCU40C, 0),
2625 ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_DISABLE, C6, A2, SCU40C, 0),
|
| D | pinctrl-aspeed-g4.c | 183 #define A2 18 macro
184 SIG_EXPR_LIST_DECL_SINGLE(A2, SD1DAT0, SD1, SD1_DESC);
185 SIG_EXPR_LIST_DECL_SINGLE(A2, SCL11, I2C11, I2C11_DESC);
186 PIN_DECL_2(A2, GPIOC2, SD1DAT0, SCL11);
193 FUNC_GROUP_DECL(I2C11, A2, E5);
222 FUNC_GROUP_DECL(SD1, C4, B3, A2, E5, D4, C3, B2, A1);
1919 ASPEED_PINCTRL_PIN(A2),
|
| /drivers/clk/renesas/ |
| D | Kconfig | 54 bool "RZ/A2 clock support" if COMPILE_TEST
|
| /drivers/media/i2c/ |
| D | adv7511-v4l2.c | 288 u16 A1, u16 A2, u16 A3, u16 A4, in adv7511_csc_coeff() argument
295 adv7511_wr_and_or(sd, 0x1A, 0xe0, A2>>8); in adv7511_csc_coeff()
296 adv7511_wr(sd, 0x1B, A2); in adv7511_csc_coeff()
|
| D | adv7842.c | 1749 sdp_io_write_and_or(sd, 0xe2, 0xe0, c->A2 >> 8); in sdp_csc_coeff()
1750 sdp_io_write(sd, 0xe3, c->A2); in sdp_csc_coeff()
|
| /drivers/gpu/drm/i915/gt/ |
| D | selftest_execlists.c | 1128 enum { A1, A2, B1 }; in live_timeslice_rewind() enumerator
1167 rq[A2] = create_rewinder(ce, NULL, slot, Y); in live_timeslice_rewind()
1169 if (IS_ERR(rq[A2])) in live_timeslice_rewind()
1172 err = wait_for_submit(engine, rq[A2], HZ / 2); in live_timeslice_rewind()
1199 while (i915_request_is_active(rq[A2])) { /* semaphore yield! */ in live_timeslice_rewind()
1208 GEM_BUG_ON(i915_request_is_active(rq[A2])); in live_timeslice_rewind()
|
| /drivers/soc/renesas/ |
| D | Kconfig | 138 bool "ARM32 Platform support for RZ/A2"
|
| /drivers/net/wireless/intel/iwlwifi/mvm/ |
| D | rxmq.c | 1581 IWL_MVM_ENC_EHT_RU(1_2_1, A2); in iwl_mvm_decode_eht_ext_mu()
|