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Searched refs:ADF_GEN2_ERRSOU5 (Results 1 – 2 of 2) sorted by relevance

/drivers/crypto/intel/qat/qat_common/
Dadf_gen2_pfvf.h10 #define ADF_GEN2_ERRSOU5 (0x3A000 + 0xD8) macro
/drivers/crypto/intel/qat/qat_dh895xcc/
Dadf_dh895xcc_hw_data.c163 errsou5 = ADF_CSR_RD(pmisc_addr, ADF_GEN2_ERRSOU5); in disable_pending_vf2pf_interrupts()