Searched refs:AUX_DPHY_RX_CONTROL1 (Results 1 – 6 of 6) sorted by relevance
/drivers/gpu/drm/amd/display/dc/dce/ |
D | dce_link_encoder.h | 42 SRI(AUX_DPHY_RX_CONTROL1, DP_AUX, id) 139 uint32_t AUX_DPHY_RX_CONTROL1; member
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D | dce_aux.h | 40 SRI(AUX_DPHY_RX_CONTROL1, DP_AUX, id), \ 59 uint32_t AUX_DPHY_RX_CONTROL1; member
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D | dce_aux.c | 477 …REG_GET_2(AUX_DPHY_RX_CONTROL1, AUX_RX_TIMEOUT_LEN, &prev_length, AUX_RX_TIMEOUT_LEN_MUL, &prev_mu… in dce_aux_configure_timeout() 497 …REG_UPDATE_SEQ_2(AUX_DPHY_RX_CONTROL1, AUX_RX_TIMEOUT_LEN, length, AUX_RX_TIMEOUT_LEN_MUL, multipl… in dce_aux_configure_timeout()
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/drivers/gpu/drm/amd/display/dc/dcn10/ |
D | dcn10_link_encoder.h | 37 SRI(AUX_DPHY_RX_CONTROL1, DP_AUX, id) 77 uint32_t AUX_DPHY_RX_CONTROL1; member
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/drivers/gpu/drm/amd/display/dc/dcn20/ |
D | dcn20_link_encoder.c | 339 AUX_REG_WRITE(AUX_DPHY_RX_CONTROL1, enc->ctx->dc_bios->golden_table.aux_dphy_rx_control1_val); in enc2_hw_init()
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/drivers/gpu/drm/amd/display/dc/dcn32/ |
D | dcn32_resource.h | 310 SRI_ARR(AUX_DPHY_RX_CONTROL1, DP_AUX, id) \ 586 SRI_ARR(AUX_DPHY_RX_CONTROL1, DP_AUX, id), \
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