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Searched refs:Array (Results 1 – 13 of 13) sorted by relevance

/drivers/staging/rtl8723bs/hal/
DHalHWImg8723B_RF.c224 u32 *Array = Array_MP_8723B_RadioA; in ODM_ReadAndConfig_MP_8723B_RadioA() local
227 u32 v1 = Array[i]; in ODM_ReadAndConfig_MP_8723B_RadioA()
228 u32 v2 = Array[i+1]; in ODM_ReadAndConfig_MP_8723B_RadioA()
544 u8 **Array = Array_MP_8723B_TXPWR_LMT; in ODM_ReadAndConfig_MP_8723B_TXPWR_LMT() local
547 u8 *regulation = Array[i]; in ODM_ReadAndConfig_MP_8723B_TXPWR_LMT()
548 u8 *bandwidth = Array[i+1]; in ODM_ReadAndConfig_MP_8723B_TXPWR_LMT()
549 u8 *rate = Array[i+2]; in ODM_ReadAndConfig_MP_8723B_TXPWR_LMT()
550 u8 *rfPath = Array[i+3]; in ODM_ReadAndConfig_MP_8723B_TXPWR_LMT()
551 u8 *chnl = Array[i+4]; in ODM_ReadAndConfig_MP_8723B_TXPWR_LMT()
552 u8 *val = Array[i+5]; in ODM_ReadAndConfig_MP_8723B_TXPWR_LMT()
DHalHWImg8723B_BB.c223 u32 *Array = Array_MP_8723B_AGC_TAB; in ODM_ReadAndConfig_MP_8723B_AGC_TAB() local
226 u32 v1 = Array[i]; in ODM_ReadAndConfig_MP_8723B_AGC_TAB()
227 u32 v2 = Array[i+1]; in ODM_ReadAndConfig_MP_8723B_AGC_TAB()
485 u32 *Array = Array_MP_8723B_PHY_REG; in ODM_ReadAndConfig_MP_8723B_PHY_REG() local
488 u32 v1 = Array[i]; in ODM_ReadAndConfig_MP_8723B_PHY_REG()
489 u32 v2 = Array[i+1]; in ODM_ReadAndConfig_MP_8723B_PHY_REG()
557 u32 *Array = Array_MP_8723B_PHY_REG_PG; in ODM_ReadAndConfig_MP_8723B_PHY_REG_PG() local
563 u32 v1 = Array[i]; in ODM_ReadAndConfig_MP_8723B_PHY_REG_PG()
564 u32 v2 = Array[i+1]; in ODM_ReadAndConfig_MP_8723B_PHY_REG_PG()
565 u32 v3 = Array[i+2]; in ODM_ReadAndConfig_MP_8723B_PHY_REG_PG()
[all …]
DHalHWImg8723B_MAC.c193 u32 *Array = Array_MP_8723B_MAC_REG; in ODM_ReadAndConfig_MP_8723B_MAC_REG() local
196 u32 v1 = Array[i]; in ODM_ReadAndConfig_MP_8723B_MAC_REG()
197 u32 v2 = Array[i+1]; in ODM_ReadAndConfig_MP_8723B_MAC_REG()
Dodm_types.h47 …EXT_PAIR(v1, v2, i) do { if (i+2 >= ArrayLen) break; i += 2; v1 = Array[i]; v2 = Array[i+1]; } whi…
Dhal_com.c965 u32 *Array = Array_kfreemap; in rtw_bb_rf_gain_offset() local
974 v1 = Array[i]; in rtw_bb_rf_gain_offset()
975 v2 = Array[i+1]; in rtw_bb_rf_gain_offset()
/drivers/mtd/nand/onenand/
DKconfig47 One Block of the NAND Flash Array memory is reserved as
49 Also, 1st Block of NAND Flash Array can be used as OTP.
52 operations as any other NAND Flash Array memory block.
/drivers/eisa/
Deisa.ids87 ALR8580 "Advanced Disk Array Caching EISA Controller"
233 CPQ4001 "Compaq 32-Bit Intelligent Drive Array Controller"
234 CPQ4002 "Compaq Intelligent Drive Array Controller-2"
235 CPQ4010 "Compaq 32-Bit Intelligent Drive Array Expansion Controller"
236 CPQ4020 "Compaq SMART Array Controller"
237 CPQ4030 "Compaq SMART-2/E Array Controller"
477 DEL4001 "Dell Drive Array"
478 DEL4002 "Dell SCSI Array Controller"
1056 ISADF03 "Weitek Array Processor, Brd #3002-0046-01"
1102 MLX0070 "Mylex DAC960 EISA Disk Array Controller"
[all …]
/drivers/fpga/
DKconfig162 Gate Array (FPGA) solutions which implement Device Feature List.
218 Field-Programmable Gate Array (FPGA) solutions which implement
/drivers/scsi/aic7xxx/
Daic7xxx.reg1016 * Byte offset into the SCB Array and an optional bit to allow auto
1281 field ARRDONE 0x40 /* SCB Array prefetch done */
Daic79xx.reg2894 * CMC SCB Array Count
/drivers/pinctrl/
DKconfig229 Programmable IO Array (FPIOA) controller.
/drivers/scsi/
DKconfig349 tristate "HP Smart Array SCSI driver"
354 This driver supports HP Smart Array Controllers (circa 2009).
356 driver. Anyone wishing to use HP Smart Array controllers who
/drivers/input/misc/
DKconfig851 tristate "Windows-compatible SoC Button Array"