Searched refs:BIT10 (Results 1 – 15 of 15) sorted by relevance
| /drivers/staging/rtl8723bs/hal/ |
| D | rtl8723b_rf6052.c | 65 pHalData->RfRegChnlVal[0] = ((pHalData->RfRegChnlVal[0] & 0xfffff3ff) | BIT10 | BIT11); in PHY_RF6052SetBandwidth8723B()
71 pHalData->RfRegChnlVal[0] = ((pHalData->RfRegChnlVal[0] & 0xfffff3ff) | BIT10); in PHY_RF6052SetBandwidth8723B()
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| D | Hal8723BReg.h | 393 #define IMR_C2HCMD_8723B BIT10 /* CPU to Host Command INT Status, Write 1 clear */
422 #define IMR_RXERR_8723B BIT10 /* Rx Error Flag INT Status, Write 1 clear */
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| D | odm_DIG.c | 22 …PHY_SetBBReg(pDM_Odm->Adapter, ODM_REG_NHM_TH9_TH10_11N, BIT10|BIT9|BIT8, 0x7); /* 0x890[9:8]=3 … in odm_NHMCounterStatisticsInit()
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| D | odm.h | 375 ODM_BB_PATH_DIV = BIT10,
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| /drivers/staging/rtl8723bs/include/ |
| D | rtl8723b_spec.h | 204 #define IMR_C2HCMD_8723B BIT10 /* CPU to Host Command INT Status, Write 1 clear */
233 #define IMR_RXERR_8723B BIT10 /* Rx Error Flag INT Status, Write 1 clear */
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| D | hal_com_reg.h | 557 #define RRSR_48M BIT10
705 #define IMR_ATIMEND BIT10 /* For 92C, ATIM Window End Interrupt. For 8723 and later ICs, it al…
721 #define IMR_RXERR BIT10
752 #define RCR_RSVD_BIT10 BIT10 /* Reserved */
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| D | osdep_service.h | 27 #define BIT10 0x00000400 macro
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| D | rtw_mlme_ext.h | 54 #define DYNAMIC_BB_PATH_DIV BIT10/* ODM_BB_PATH_DIV */
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| /drivers/staging/rtl8192e/rtl8192e/ |
| D | r8192E_hw.h | 112 #define IMR_RXCMDOK BIT10
191 #define RRSR_48M BIT10
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| /drivers/net/wireless/realtek/rtlwifi/btcoexist/ |
| D | halbt_precomp.h | 41 #define BIT10 0x00000400 macro
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| /drivers/staging/rtl8192e/ |
| D | rtl819x_Qos.h | 20 #define BIT10 0x00000400 macro
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| /drivers/scsi/ |
| D | dc395x.h | 66 #define BIT10 0x00000400 macro
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| /drivers/tty/ |
| D | synclink_gt.c | 384 #define IRQ_RXDATA BIT10
2042 if (count == info->rbuf_fill_level || (reg & BIT10)) { in isr_rxdata()
4183 case HDLC_ENCODING_NRZB: val |= BIT10; break; in sync_mode()
4185 case HDLC_ENCODING_NRZI: val |= BIT11 + BIT10; break; in sync_mode()
4187 case HDLC_ENCODING_BIPHASE_SPACE: val |= BIT12 + BIT10; break; in sync_mode()
4189 case HDLC_ENCODING_DIFF_BIPHASE_LEVEL: val |= BIT12 + BIT11 + BIT10; break; in sync_mode()
4256 case HDLC_ENCODING_NRZB: val |= BIT10; break; in sync_mode()
4258 case HDLC_ENCODING_NRZI: val |= BIT11 + BIT10; break; in sync_mode()
4260 case HDLC_ENCODING_BIPHASE_SPACE: val |= BIT12 + BIT10; break; in sync_mode()
4262 case HDLC_ENCODING_DIFF_BIPHASE_LEVEL: val |= BIT12 + BIT11 + BIT10; break; in sync_mode()
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| /drivers/net/wireless/realtek/rtlwifi/rtl8192de/ |
| D | reg.h | 368 #define RRSR_48M BIT10
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| /drivers/scsi/lpfc/ |
| D | lpfc_hw4.h | 777 #define LPFC_SLI4_INTR10 BIT10
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