Searched refs:C1_B_Cb (Results 1 – 6 of 6) sorted by relevance
/drivers/gpu/drm/msm/disp/dpu1/ |
D | dpu_formats.c | 199 C1_B_Cb, C0_G_Y, C2_R_Cr, C3_ALPHA, 4, 205 C2_R_Cr, C0_G_Y, C1_B_Cb, C3_ALPHA, 4, 211 C2_R_Cr, C0_G_Y, C1_B_Cb, C3_ALPHA, 4, 217 C3_ALPHA, C1_B_Cb, C0_G_Y, C2_R_Cr, 4, 223 C3_ALPHA, C2_R_Cr, C0_G_Y, C1_B_Cb, 4, 229 C3_ALPHA, C2_R_Cr, C0_G_Y, C1_B_Cb, 4, 235 C1_B_Cb, C0_G_Y, C2_R_Cr, C3_ALPHA, 4, 241 C3_ALPHA, C1_B_Cb, C0_G_Y, C2_R_Cr, 4, 247 C1_B_Cb, C0_G_Y, C2_R_Cr, 0, 3, 253 C2_R_Cr, C0_G_Y, C1_B_Cb, 0, 3, [all …]
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D | dpu_hw_mdss.h | 289 C1_B_Cb = 1, enumerator
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D | dpu_hw_wb.c | 79 (fmt->bits[C1_B_Cb] << 2) | in dpu_hw_wb_setup_format()
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D | dpu_hw_intf.c | 197 (fmt->bits[C1_B_Cb] << 2) | in dpu_hw_intf_setup_timing_engine()
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D | dpu_encoder_phys_wb.c | 597 (wb_cfg->dest.format->element[0] == C1_B_Cb)) in dpu_encoder_phys_wb_prepare_wb_job()
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D | dpu_hw_sspp.c | 250 (fmt->bits[C1_B_Cb] << 2) | (fmt->bits[C0_G_Y] << 0); in dpu_hw_sspp_setup_format()
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