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Searched refs:C20_MPLLB_FRACEN (Results 1 – 2 of 2) sorted by relevance

/drivers/gpu/drm/i915/display/
Dintel_cx0_phy_regs.h210 #define C20_MPLLB_FRACEN REG_BIT(13) macro
Dintel_cx0_phy.c1965 pll_state->mpllb[6] = (C20_MPLLB_FRACEN | SSC_UP_SPREAD); in intel_c20_compute_hdmi_tmds_pll()
2377 frac_en = REG_FIELD_GET(C20_MPLLB_FRACEN, pll_state->mpllb[6]); in intel_c20pll_calc_port_clock()