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Searched refs:CSIDPHYTIM0_TCLK_MISS (Results 1 – 1 of 1) sorted by relevance

/drivers/media/platform/renesas/rzg2l-cru/
Drzg2l-csi2.c67 #define CSIDPHYTIM0_TCLK_MISS(x) ((x) << 24) macro
320 dphytim0 = CSIDPHYTIM0_TCLK_MISS(dphy_timing->tclk_miss) | in rzg2l_csi2_dphy_enable()