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Searched refs:CTL_0 (Results 1 – 24 of 24) sorted by relevance

/drivers/gpu/drm/msm/disp/dpu1/
Ddpu_rm.c197 rm->ctl_blks[ctl->id - CTL_0] = &hw->base; in dpu_rm_init()
440 DPU_DEBUG("ctl %d caps 0x%lX\n", j + CTL_0, features); in _dpu_rm_reserve_ctls()
446 DPU_DEBUG("ctl %d match\n", j + CTL_0); in _dpu_rm_reserve_ctls()
458 trace_dpu_rm_reserve_ctls(i + CTL_0, enc_id); in _dpu_rm_reserve_ctls()
Ddpu_rm.h29 struct dpu_hw_blk *ctl_blks[CTL_MAX - CTL_0];
Ddpu_kms.h127 uint32_t ctl_to_enc_id[CTL_MAX - CTL_0];
Ddpu_hw_mdss.h168 CTL_0 = 1, enumerator
Ddpu_crtc.c553 ctl->idx - CTL_0); in _dpu_crtc_blend_setup()
1034 drm_printf(p, "\tctl[%d]=%d\n", i, cstate->mixers[i].lm_ctl->idx - CTL_0); in dpu_crtc_atomic_print_state()
1308 m->hw_lm->idx - LM_0, m->lm_ctl->idx - CTL_0, in _dpu_debugfs_status_show()
Ddpu_encoder_phys_wb.c318 hw_ctl->idx - CTL_0, pending_flush, in _dpu_encoder_phys_wb_update_flush()
Ddpu_encoder_phys_cmd.c201 phys_enc->hw_ctl->idx - CTL_0, in _dpu_encoder_phys_cmd_handle_ppdone_timeout()
Ddpu_encoder_phys_vid.c437 ctl->idx - CTL_0, phys_enc->hw_intf->idx); in dpu_encoder_phys_vid_enable()
/drivers/gpu/drm/msm/disp/dpu1/catalog/
Ddpu_6_5_qcm2290.h30 .name = "ctl_0", .id = CTL_0,
Ddpu_6_3_sm6115.h31 .name = "ctl_0", .id = CTL_0,
Ddpu_6_9_sm6375.h32 .name = "ctl_0", .id = CTL_0,
Ddpu_5_4_sm6125.h35 .name = "ctl_0", .id = CTL_0,
Ddpu_6_4_sm6350.h36 .name = "ctl_0", .id = CTL_0,
Ddpu_6_2_sc7180.h34 .name = "ctl_0", .id = CTL_0,
Ddpu_7_2_sc7280.h34 .name = "ctl_0", .id = CTL_0,
Ddpu_3_0_msm8998.h44 .name = "ctl_0", .id = CTL_0,
Ddpu_4_0_sdm845.h42 .name = "ctl_0", .id = CTL_0,
Ddpu_7_0_sm8350.h42 .name = "ctl_0", .id = CTL_0,
Ddpu_6_0_sm8250.h42 .name = "ctl_0", .id = CTL_0,
Ddpu_5_0_sm8150.h43 .name = "ctl_0", .id = CTL_0,
Ddpu_9_0_sm8550.h44 .name = "ctl_0", .id = CTL_0,
Ddpu_8_1_sm8450.h43 .name = "ctl_0", .id = CTL_0,
Ddpu_5_1_sc8180x.h42 .name = "ctl_0", .id = CTL_0,
Ddpu_8_0_sc8280xp.h42 .name = "ctl_0", .id = CTL_0,