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Searched refs:CURRENT_GATE_MCLK_DIV_6 (Results 1 – 2 of 2) sorted by relevance

/drivers/staging/sm750fb/
Dddk750_chip.c170 reg |= CURRENT_GATE_MCLK_DIV_6; in set_master_clock()
Dddk750_reg.h305 #define CURRENT_GATE_MCLK_DIV_6 (0x2 << 14) macro