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Searched refs:DC_STATE_EN (Results 1 – 4 of 4) sorted by relevance

/drivers/gpu/drm/i915/display/
Dintel_display_power_well.c611 (intel_de_read(dev_priv, DC_STATE_EN) & DC_STATE_EN_DC9), in assert_can_enable_dc9()
614 intel_de_read(dev_priv, DC_STATE_EN) & in assert_can_enable_dc9()
638 intel_de_read(dev_priv, DC_STATE_EN) & in assert_can_disable_dc9()
658 intel_de_write(dev_priv, DC_STATE_EN, state); in gen9_write_dc_state()
666 v = intel_de_read(dev_priv, DC_STATE_EN); in gen9_write_dc_state()
669 intel_de_write(dev_priv, DC_STATE_EN, state); in gen9_write_dc_state()
717 val = intel_de_read(i915, DC_STATE_EN) & gen9_dc_mask(i915); in gen9_sanitize_dc_state()
761 val = intel_de_read(dev_priv, DC_STATE_EN); in gen9_set_dc_state()
788 intel_de_rmw(dev_priv, DC_STATE_EN, DC_STATE_DC3CO_STATUS, 0); in tgl_disable_dc3co()
811 (intel_de_read(dev_priv, DC_STATE_EN) & in assert_can_enable_dc5()
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Dintel_display_power.c1676 intel_de_rmw(dev_priv, DC_STATE_EN, in icl_display_core_init()
1733 intel_de_rmw(dev_priv, DC_STATE_EN, 0, in icl_display_core_uninit()
/drivers/gpu/drm/i915/
Dintel_gvt_mmio_table.c919 MMIO_D(DC_STATE_EN); in iterate_skl_plus_mmio()
Di915_reg.h6227 #define DC_STATE_EN _MMIO(0x45504) macro