Searched refs:DC_WIN_CORE_IHUB_WGRP_LATENCY_CTLB (Results 1 – 2 of 2) sorted by relevance
393 value = tegra_plane_readl(plane, DC_WIN_CORE_IHUB_WGRP_LATENCY_CTLB); in tegra_dc_assign_shared_plane()395 tegra_plane_writel(plane, value, DC_WIN_CORE_IHUB_WGRP_LATENCY_CTLB); in tegra_dc_assign_shared_plane()
549 #define DC_WIN_CORE_IHUB_WGRP_LATENCY_CTLB 0x544 macro