Searched refs:DMA_CH_CR (Results 1 – 4 of 4) sorted by relevance
| /drivers/net/ethernet/synopsys/ |
| D | dwc-xlgmac-reg.h | 540 #define DMA_CH_CR 0x00 macro
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| D | dwc-xlgmac-hw.c | 1408 regval = readl(XLGMAC_DMA_REG(channel, DMA_CH_CR)); in xlgmac_config_sph_mode()
1411 writel(regval, XLGMAC_DMA_REG(channel, DMA_CH_CR)); in xlgmac_config_sph_mode()
1768 regval = readl(XLGMAC_DMA_REG(channel, DMA_CH_CR)); in xlgmac_config_pblx8()
1772 writel(regval, XLGMAC_DMA_REG(channel, DMA_CH_CR)); in xlgmac_config_pblx8()
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| /drivers/net/ethernet/amd/xgbe/ |
| D | xgbe-common.h | 187 #define DMA_CH_CR 0x00 macro
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| D | xgbe-dev.c | 192 XGMAC_DMA_IOWRITE_BITS(pdata->channel[i], DMA_CH_CR, PBLX8, in xgbe_config_pbl_val()
317 XGMAC_DMA_IOWRITE_BITS(pdata->channel[i], DMA_CH_CR, SPH, 1); in xgbe_config_sph_mode()
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