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Searched refs:DMA_CH_RCR (Results 1 – 4 of 4) sorted by relevance

/drivers/net/ethernet/synopsys/
Ddwc-xlgmac-hw.c613 regval = readl(XLGMAC_DMA_REG(channel, DMA_CH_RCR)); in xlgmac_enable_rx()
616 writel(regval, XLGMAC_DMA_REG(channel, DMA_CH_RCR)); in xlgmac_enable_rx()
669 regval = readl(XLGMAC_DMA_REG(channel, DMA_CH_RCR)); in xlgmac_disable_rx()
672 writel(regval, XLGMAC_DMA_REG(channel, DMA_CH_RCR)); in xlgmac_disable_rx()
1369 regval = readl(XLGMAC_DMA_REG(channel, DMA_CH_RCR)); in xlgmac_config_rx_buffer_size()
1373 writel(regval, XLGMAC_DMA_REG(channel, DMA_CH_RCR)); in xlgmac_config_rx_buffer_size()
1813 regval = readl(XLGMAC_DMA_REG(pdata->channel_head, DMA_CH_RCR)); in xlgmac_get_rx_pbl_val()
1830 regval = readl(XLGMAC_DMA_REG(channel, DMA_CH_RCR)); in xlgmac_config_rx_pbl_val()
1834 writel(regval, XLGMAC_DMA_REG(channel, DMA_CH_RCR)); in xlgmac_config_rx_pbl_val()
Ddwc-xlgmac-reg.h542 #define DMA_CH_RCR 0x08 macro
/drivers/net/ethernet/amd/xgbe/
Dxgbe-dev.c200 XGMAC_DMA_IOWRITE_BITS(pdata->channel[i], DMA_CH_RCR, in xgbe_config_pbl_val()
292 XGMAC_DMA_IOWRITE_BITS(pdata->channel[i], DMA_CH_RCR, RBSZ, in xgbe_config_rx_buffer_size()
3419 XGMAC_DMA_IOWRITE_BITS(pdata->channel[i], DMA_CH_RCR, SR, 1); in xgbe_enable_rx()
3457 XGMAC_DMA_IOWRITE_BITS(pdata->channel[i], DMA_CH_RCR, SR, 0); in xgbe_disable_rx()
3506 XGMAC_DMA_IOWRITE_BITS(pdata->channel[i], DMA_CH_RCR, SR, 1); in xgbe_powerup_rx()
3519 XGMAC_DMA_IOWRITE_BITS(pdata->channel[i], DMA_CH_RCR, SR, 0); in xgbe_powerdown_rx()
Dxgbe-common.h189 #define DMA_CH_RCR 0x08 macro