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Searched refs:F_PL_INTR_SGE_DATA (Results 1 – 3 of 3) sorted by relevance

/drivers/net/ethernet/chelsio/cxgb/
Dsubr.c213 cause &= ~F_PL_INTR_SGE_DATA; in fpga_slow_intr()
875 writel(adapter->slow_intr_mask | F_PL_INTR_SGE_DATA, in asic_slow_intr()
Dsge.c892 #define SGE_PL_INTR_MASK (F_PL_INTR_SGE_ERR | F_PL_INTR_SGE_DATA)
1645 writel(adapter->slow_intr_mask | F_PL_INTR_SGE_DATA, in t1_interrupt_thread()
1659 writel(F_PL_INTR_SGE_DATA, adapter->regs + A_PL_CAUSE); in t1_interrupt()
Dregs.h1743 #define F_PL_INTR_SGE_DATA V_PL_INTR_SGE_DATA(1U) macro