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Searched refs:GRPH_DEPTH (Results 1 – 7 of 7) sorted by relevance

/drivers/gpu/drm/amd/display/dc/dce/
Ddce_mem_input.h182 SFB(blk, GRPH_CONTROL, GRPH_DEPTH, mask_sh),\
207 SFB(blk, GRPH_CONTROL, GRPH_DEPTH, mask_sh),\
357 type GRPH_DEPTH; \
Ddce_mem_input.c620 GRPH_DEPTH, grph_depth, in program_grph_pixel_format()
/drivers/gpu/drm/amd/amdgpu/
Dsi_enums.h70 #define GRPH_DEPTH(x) (((x) & 0x3) << 0) macro
Ddce_v6_0.c1860 fb_format = (GRPH_DEPTH(GRPH_DEPTH_8BPP) | in dce_v6_0_crtc_do_set_base()
1865 fb_format = (GRPH_DEPTH(GRPH_DEPTH_16BPP) | in dce_v6_0_crtc_do_set_base()
1873 fb_format = (GRPH_DEPTH(GRPH_DEPTH_16BPP) | in dce_v6_0_crtc_do_set_base()
1881 fb_format = (GRPH_DEPTH(GRPH_DEPTH_16BPP) | in dce_v6_0_crtc_do_set_base()
1888 fb_format = (GRPH_DEPTH(GRPH_DEPTH_16BPP) | in dce_v6_0_crtc_do_set_base()
1896 fb_format = (GRPH_DEPTH(GRPH_DEPTH_32BPP) | in dce_v6_0_crtc_do_set_base()
1904 fb_format = (GRPH_DEPTH(GRPH_DEPTH_32BPP) | in dce_v6_0_crtc_do_set_base()
1914 fb_format = (GRPH_DEPTH(GRPH_DEPTH_32BPP) | in dce_v6_0_crtc_do_set_base()
1924 fb_format = (GRPH_DEPTH(GRPH_DEPTH_32BPP) | in dce_v6_0_crtc_do_set_base()
Ddce_v10_0.c1896 fb_format = REG_SET_FIELD(0, GRPH_CONTROL, GRPH_DEPTH, 0); in dce_v10_0_crtc_do_set_base()
1901 fb_format = REG_SET_FIELD(0, GRPH_CONTROL, GRPH_DEPTH, 1); in dce_v10_0_crtc_do_set_base()
1910 fb_format = REG_SET_FIELD(0, GRPH_CONTROL, GRPH_DEPTH, 1); in dce_v10_0_crtc_do_set_base()
1919 fb_format = REG_SET_FIELD(0, GRPH_CONTROL, GRPH_DEPTH, 1); in dce_v10_0_crtc_do_set_base()
1927 fb_format = REG_SET_FIELD(0, GRPH_CONTROL, GRPH_DEPTH, 1); in dce_v10_0_crtc_do_set_base()
1936 fb_format = REG_SET_FIELD(0, GRPH_CONTROL, GRPH_DEPTH, 2); in dce_v10_0_crtc_do_set_base()
1945 fb_format = REG_SET_FIELD(0, GRPH_CONTROL, GRPH_DEPTH, 2); in dce_v10_0_crtc_do_set_base()
1956 fb_format = REG_SET_FIELD(0, GRPH_CONTROL, GRPH_DEPTH, 2); in dce_v10_0_crtc_do_set_base()
1967 fb_format = REG_SET_FIELD(0, GRPH_CONTROL, GRPH_DEPTH, 2); in dce_v10_0_crtc_do_set_base()
Ddce_v11_0.c1946 fb_format = REG_SET_FIELD(0, GRPH_CONTROL, GRPH_DEPTH, 0); in dce_v11_0_crtc_do_set_base()
1951 fb_format = REG_SET_FIELD(0, GRPH_CONTROL, GRPH_DEPTH, 1); in dce_v11_0_crtc_do_set_base()
1960 fb_format = REG_SET_FIELD(0, GRPH_CONTROL, GRPH_DEPTH, 1); in dce_v11_0_crtc_do_set_base()
1969 fb_format = REG_SET_FIELD(0, GRPH_CONTROL, GRPH_DEPTH, 1); in dce_v11_0_crtc_do_set_base()
1977 fb_format = REG_SET_FIELD(0, GRPH_CONTROL, GRPH_DEPTH, 1); in dce_v11_0_crtc_do_set_base()
1986 fb_format = REG_SET_FIELD(0, GRPH_CONTROL, GRPH_DEPTH, 2); in dce_v11_0_crtc_do_set_base()
1995 fb_format = REG_SET_FIELD(0, GRPH_CONTROL, GRPH_DEPTH, 2); in dce_v11_0_crtc_do_set_base()
2006 fb_format = REG_SET_FIELD(0, GRPH_CONTROL, GRPH_DEPTH, 2); in dce_v11_0_crtc_do_set_base()
2017 fb_format = REG_SET_FIELD(0, GRPH_CONTROL, GRPH_DEPTH, 2); in dce_v11_0_crtc_do_set_base()
/drivers/gpu/drm/amd/display/dc/dce110/
Ddce110_mem_input_v.c412 GRPH_DEPTH); in program_pixel_format()