Home
last modified time | relevance | path

Searched refs:HAL_SEQ_WCSS_UMAC_REO_REG (Results 1 – 7 of 7) sorted by relevance

/drivers/net/wireless/ath/ath12k/
Dhal.c531 s->reg_start[0] = HAL_SEQ_WCSS_UMAC_REO_REG + HAL_REO1_RING_BASE_LSB(ab); in ath12k_hal_srng_create_config_qcn9274()
532 s->reg_start[1] = HAL_SEQ_WCSS_UMAC_REO_REG + HAL_REO1_RING_HP; in ath12k_hal_srng_create_config_qcn9274()
537 s->reg_start[0] = HAL_SEQ_WCSS_UMAC_REO_REG + HAL_REO_SW0_RING_BASE_LSB(ab); in ath12k_hal_srng_create_config_qcn9274()
538 s->reg_start[1] = HAL_SEQ_WCSS_UMAC_REO_REG + HAL_REO_SW0_RING_HP; in ath12k_hal_srng_create_config_qcn9274()
541 s->reg_start[0] = HAL_SEQ_WCSS_UMAC_REO_REG + HAL_SW2REO_RING_BASE_LSB(ab); in ath12k_hal_srng_create_config_qcn9274()
542 s->reg_start[1] = HAL_SEQ_WCSS_UMAC_REO_REG + HAL_SW2REO_RING_HP; in ath12k_hal_srng_create_config_qcn9274()
547 s->reg_start[0] = HAL_SEQ_WCSS_UMAC_REO_REG + HAL_REO_CMD_RING_BASE_LSB(ab); in ath12k_hal_srng_create_config_qcn9274()
548 s->reg_start[1] = HAL_SEQ_WCSS_UMAC_REO_REG + HAL_REO_CMD_HP; in ath12k_hal_srng_create_config_qcn9274()
551 s->reg_start[0] = HAL_SEQ_WCSS_UMAC_REO_REG + HAL_REO_STATUS_RING_BASE_LSB(ab); in ath12k_hal_srng_create_config_qcn9274()
552 s->reg_start[1] = HAL_SEQ_WCSS_UMAC_REO_REG + HAL_REO_STATUS_HP; in ath12k_hal_srng_create_config_qcn9274()
[all …]
Ddp.c1234 HAL_SEQ_WCSS_UMAC_REO_REG + HAL_REO1_QDESC_LUT_BASE0(ab), 0); in ath12k_dp_reoq_lut_cleanup()
1262 u32 reo_base = HAL_SEQ_WCSS_UMAC_REO_REG; in ath12k_dp_cc_config()
1507 ath12k_hif_write32(ab, HAL_SEQ_WCSS_UMAC_REO_REG + HAL_REO1_QDESC_LUT_BASE0(ab), in ath12k_dp_reoq_lut_setup()
Dhal.h45 #define HAL_SEQ_WCSS_UMAC_REO_REG 0x00a38000 macro
Dhal_rx.c818 u32 reo_base = HAL_SEQ_WCSS_UMAC_REO_REG; in ath12k_hal_reo_hw_setup()
/drivers/net/wireless/ath/ath11k/
Dhal.c1187 s->reg_start[0] = HAL_SEQ_WCSS_UMAC_REO_REG + HAL_REO1_RING_BASE_LSB(ab); in ath11k_hal_srng_create_config()
1188 s->reg_start[1] = HAL_SEQ_WCSS_UMAC_REO_REG + HAL_REO1_RING_HP(ab); in ath11k_hal_srng_create_config()
1193 s->reg_start[0] = HAL_SEQ_WCSS_UMAC_REO_REG + HAL_REO_TCL_RING_BASE_LSB(ab); in ath11k_hal_srng_create_config()
1194 s->reg_start[1] = HAL_SEQ_WCSS_UMAC_REO_REG + HAL_REO_TCL_RING_HP(ab); in ath11k_hal_srng_create_config()
1197 s->reg_start[0] = HAL_SEQ_WCSS_UMAC_REO_REG + HAL_SW2REO_RING_BASE_LSB(ab); in ath11k_hal_srng_create_config()
1198 s->reg_start[1] = HAL_SEQ_WCSS_UMAC_REO_REG + HAL_SW2REO_RING_HP(ab); in ath11k_hal_srng_create_config()
1201 s->reg_start[0] = HAL_SEQ_WCSS_UMAC_REO_REG + HAL_REO_CMD_RING_BASE_LSB(ab); in ath11k_hal_srng_create_config()
1202 s->reg_start[1] = HAL_SEQ_WCSS_UMAC_REO_REG + HAL_REO_CMD_HP(ab); in ath11k_hal_srng_create_config()
1205 s->reg_start[0] = HAL_SEQ_WCSS_UMAC_REO_REG + HAL_REO_STATUS_RING_BASE_LSB(ab); in ath11k_hal_srng_create_config()
1206 s->reg_start[1] = HAL_SEQ_WCSS_UMAC_REO_REG + HAL_REO_STATUS_HP(ab); in ath11k_hal_srng_create_config()
Dhw.c107 u32 reo_base = HAL_SEQ_WCSS_UMAC_REO_REG; in ath11k_hw_ipq8074_reo_setup()
761 u32 reo_base = HAL_SEQ_WCSS_UMAC_REO_REG; in ath11k_hw_wcn6855_reo_setup()
800 u32 reo_base = HAL_SEQ_WCSS_UMAC_REO_REG; in ath11k_hw_ipq5018_reo_setup()
Dhal.h44 #define HAL_SEQ_WCSS_UMAC_REO_REG 0x00a38000 macro