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Searched refs:ICL_DSC0_RC_BUF_THRESH_1_UDW (Results 1 – 2 of 2) sorted by relevance

/drivers/gpu/drm/i915/display/
Dintel_vdsc_regs.h375 #define ICL_DSC0_RC_BUF_THRESH_1_UDW(pipe) _MMIO_PIPE((pipe) - PIPE_B, \ macro
Dintel_vdsc.c760 intel_de_write(dev_priv, ICL_DSC0_RC_BUF_THRESH_1_UDW(pipe), in intel_dsc_pps_configure()