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Searched refs:INSTANCE_BROADCAST_WRITES (Results 1 – 23 of 23) sorted by relevance

/drivers/gpu/drm/radeon/
Dni.c1082 WREG32(GRBM_GFX_INDEX, INSTANCE_BROADCAST_WRITES | SE_INDEX(i)); in cayman_gpu_init()
1083 WREG32(RLC_GFX_INDEX, INSTANCE_BROADCAST_WRITES | SE_INDEX(i)); in cayman_gpu_init()
1102 WREG32(GRBM_GFX_INDEX, INSTANCE_BROADCAST_WRITES | SE_INDEX(i)); in cayman_gpu_init()
1103 WREG32(RLC_GFX_INDEX, INSTANCE_BROADCAST_WRITES | SE_INDEX(i)); in cayman_gpu_init()
1111 WREG32(GRBM_GFX_INDEX, INSTANCE_BROADCAST_WRITES | SE_BROADCAST_WRITES); in cayman_gpu_init()
1112 WREG32(RLC_GFX_INDEX, INSTANCE_BROADCAST_WRITES | SE_BROADCAST_WRITES); in cayman_gpu_init()
Devergreen.c3467 WREG32(GRBM_GFX_INDEX, INSTANCE_BROADCAST_WRITES | SE_INDEX(i)); in evergreen_gpu_init()
3468 WREG32(RLC_GFX_INDEX, INSTANCE_BROADCAST_WRITES | SE_INDEX(i)); in evergreen_gpu_init()
3488 WREG32(GRBM_GFX_INDEX, INSTANCE_BROADCAST_WRITES | SE_INDEX(i)); in evergreen_gpu_init()
3489 WREG32(RLC_GFX_INDEX, INSTANCE_BROADCAST_WRITES | SE_INDEX(i)); in evergreen_gpu_init()
3497 WREG32(GRBM_GFX_INDEX, INSTANCE_BROADCAST_WRITES | SE_BROADCAST_WRITES); in evergreen_gpu_init()
3498 WREG32(RLC_GFX_INDEX, INSTANCE_BROADCAST_WRITES | SE_BROADCAST_WRITES); in evergreen_gpu_init()
Dnid.h298 #define INSTANCE_BROADCAST_WRITES (1 << 30) macro
Dsid.h1003 #define INSTANCE_BROADCAST_WRITES (1 << 30) macro
Dcikd.h1632 #define INSTANCE_BROADCAST_WRITES (1 << 30) macro
Devergreend.h415 #define INSTANCE_BROADCAST_WRITES (1 << 30) macro
Dsi.c2949 u32 data = INSTANCE_BROADCAST_WRITES; in si_select_se_sh()
Dcik.c3029 u32 data = INSTANCE_BROADCAST_WRITES; in cik_select_se_sh()
/drivers/gpu/drm/amd/amdgpu/
Damdgpu_amdkfd_gfx_v8.c554 INSTANCE_BROADCAST_WRITES, 1); in kgd_wave_control_execute()
Damdgpu_amdkfd_gfx_v10_3.c601 INSTANCE_BROADCAST_WRITES, 1); in wave_control_execute_v10_3()
Damdgpu_amdkfd_gfx_v11.c586 INSTANCE_BROADCAST_WRITES, 1); in wave_control_execute_v11()
Damdgpu_amdkfd_gfx_v10.c689 INSTANCE_BROADCAST_WRITES, 1); in kgd_wave_control_execute()
Damdgpu_amdkfd_gfx_v9.c641 INSTANCE_BROADCAST_WRITES, 1); in kgd_gfx_v9_wave_control_execute()
Dgfx_v9_4.c100 INSTANCE_BROADCAST_WRITES, 1); in gfx_v9_4_select_se_sh()
Dsid.h1001 #define INSTANCE_BROADCAST_WRITES (1 << 30) macro
Dgfx_v9_4_2.c856 INSTANCE_BROADCAST_WRITES, 1); in gfx_v9_4_2_select_se_sh()
Dgfx_v6_0.c1293 data = REG_SET_FIELD(0, GRBM_GFX_INDEX, INSTANCE_BROADCAST_WRITES, 1); in gfx_v6_0_select_se_sh()
Dgfx_v7_0.c1559 data = REG_SET_FIELD(0, GRBM_GFX_INDEX, INSTANCE_BROADCAST_WRITES, 1); in gfx_v7_0_select_se_sh()
Dgfx_v9_4_3.c530 INSTANCE_BROADCAST_WRITES, 1); in gfx_v9_4_3_xcc_select_se_sh()
Dgfx_v11_0.c1538 INSTANCE_BROADCAST_WRITES, 1); in gfx_v11_0_select_se_sh()
Dgfx_v8_0.c3404 data = REG_SET_FIELD(0, GRBM_GFX_INDEX, INSTANCE_BROADCAST_WRITES, 1); in gfx_v8_0_select_se_sh()
Dgfx_v9_0.c2225 data = REG_SET_FIELD(0, GRBM_GFX_INDEX, INSTANCE_BROADCAST_WRITES, 1); in gfx_v9_0_select_se_sh()
Dgfx_v10_0.c4698 INSTANCE_BROADCAST_WRITES, 1); in gfx_v10_0_select_se_sh()